Co-packaged optics is one of the most talked about innovations in advanced packaging right now, and it’s for good reason. It promises higher bandwidth density, lower power consumption, and reduced latency over other packaging approaches – all of which are essential for enabling smarter AI solutions.
To learn more about current developments in co-packaged optics (CPO), I spoke with ASE’s Senior Technical Advisor, Bill Chen, and VP of Corporate R&D, C.P. Hung. They both informed me that with a strong push, CPO is on track for production by 2027. Although the technology isn’t quite there yet, the industry is hard at work trying to make it a practical reality.
What is CPO?
The foundation of most CPO is essentially a 2.5D package, or a GPU surrounded by multiple HBM stacks. After the establishment of 2.5D in 2015, industry leaders realized that bringing the optical engine into the same package could lead to substantial performance improvements. As of now, most optical engines are placed far away on the edge of the PCB.
The current optical structure poses limitations. After the electrical signal is sent from the GPU, the signal must be converted to optical on each side, then go to the other side and convert back. This takes a lot of time, energy, and space, which is why the industry is trying to move away from this. However, creating a viable CPO solution requires breakthroughs in science and technology that haven’t quite come to fruition yet. But, because it offers so much promise, the industry is prioritizing its development.
CPO Challenges
Developing CPO hasn’t been easy. Chen explained that the industry needs to address the electrical signals first, then it needs to handle the Photonic Integrated Circuits (PICs) for all of the different chips that need to be put together. The industry then needs to determine how each component will fit together and how to bring in the fiber connectors.
However, the biggest challenge with CPO is the size of the connectors themselves. As Hung noted, the industry needs connectors around 80% smaller than what’s currently available. Bandwidth is another major consideration. Bandwidth on the edge of the PCB is small, because it needs to go through a lot of electrical routing. But, once the optical engine is successfully integrated into the package, industry leaders can then redesign the engine with as much as 32x more bandwidth.
We can describe bandwidth like a highway. More highways and more lanes in each allows more traffic to pass through a given area. Bandwidth works the same. Instead of being limited by a single lane highway, CPO offers the ability to add more lanes, thus allowing for faster data transfer. Hung highlighted that current CPO demonstrations are showing 6.4 terabits per second. This is a drastic improvement from the average high-speed bandwidth of 200 gigabits per second that we can get without CPO.
Finally, smaller connectors and new components also require novel materials and new assembly and testing methods. When hyper-specialization is needed, it becomes more difficult to manufacture the chips from a supply chain perspective.
Moving Forward
To bring CPO to the market, Chen and Hung emphasized the importance of industry-wide collaboration. Putting issues on the table and finding people who can contribute, they said, will drive this technology forward.
“We can’t do it alone,” said Hung. “We need to rely on all different partners.”
Fortunately, many collaboration efforts are well underway. ASE’s CEO, Tien Wu, helped form SEMI’s Silicon Photonics Industry Alliance (SiPhIA) – a group that convenes leaders from industry, government, and academia to promote technical exchange and set standards for emerging photonics technologies. Additionally, the Optical Fiber Communications (OFC) conference brings together thousands of leaders each year to move optical technology forward.
Will CPO be here by 2027? We’ll just need to wait and see.
