Program chair Erik Volkerink of Verigy discusses this year’s International Test Conference in an interview with Rick Nelson, Chief Editor, Test and Measurment World.

The testing of 3-D chips, protocol-aware test, and concurrent test will be key topics on the agenda of the 41st International Test Conference October 31 through November 5 in Austin TX. While the test of 3-D chips was a key focus at last year’s ITC, the topic will get much more emphasis this year, according to program chair Erik Volkerink (Verigy’s chief technologist). The topic will be addressed in a tutorial (“Testing TSV-based 3-D Stacked ICs”), a panel (“3-D Test-A New Paradigm in Semiconductor Test”), and a workshop (“3D-Test: 1st IEEE International Workshop on Testing Three-Dimensional Stacked ICs”) as well as in several papers. (full story)

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