Guest bloggers from across the supply chain and from various market segments contribute to provide insight on the implications of 3D integration technologies. Industry experts who have something to say are invited to participate.

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Advanced Heterogeneous Packaging Solutions for High Performance Computing

Heterogeneous integrated circuit (IC) packaging has made a full entrance into the high-performance computing arena. The target applications are broad, running the gamut from artificial intelligence (AI), deep learning, data center networking, supercomputers, and autonomous driving. In fact, a new generation of deep learning AI, leading central processing units (CPUs) for data center servers as wel... »

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Advanced Packaging: Game Changer for Semiconductor Revolution

Advanced packaging has entered its most successful era boosted by a need for better integration, the end of Moore’s law and, beyond that, the megatrends, transportation, 5G, consumer, memory & computing, artificial intelligence (AI) and high-performance computing (HPC). The market today is dominated by large integrated device manufacturers (IDMs), such as Intel and Samsung, top four global o... »

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Heterogeneous Integration Calls for Increased Materials Reliability

Automotive reliability is a pivotal concern for heterogeneous integration technologies, especially as emerging mission profiles for electric and autonomous vehicles push component lifetimes out by two to three times or more over standard testing regimes. There has been an increasing realization of the importance of chip-package interaction (CPI) as a source of reliability issues in semiconductor a... »


Extending Moore’s Law through Advanced Packaging

The performance and productivity of microelectronics have increased continuously over the last 50 years due to the enormous advances in lithography and device technology. Today, these technologies are becoming prevalent in 3D packaging, which further enables advances in integrating various technologies (logic, memory, RF, sensors, etc.) in a small form factor. There are concerns with the sustainab... »

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Thank 2.5D Interposer Technologies for the Success of 3D ICs

Would it be flippant to say that the most pivotal event that impacted the commercialization of 3D integration technologies, may have been the commercialization of 2.5D interposer technologies? Arguably, 3D and silicon interposer are very different technologies, with a common denominator that happens to be the through silicon via (TSV). Until Xilinx announced its Virtix-7 2000T in or around 2011, s... »

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MEMS & Sensors Technical Congress Highlights Automotive Market, Emerging MEMS Technologies

This year’s MEMS & Sensors Technical Congress (MSTC), February 19-20, 2019, features a deep dive into the changing automotive sensor landscape, a look at emerging MEMS technologies, and an exploration of integration standards. The more technically focused of SEMI’s annual MEMS events, MSTC returns to Monterey, California, in conjunction with FLEX, the conference that highlights new form fa... »

3D Integration Enables More than Moore Technologies

Looking back at the last 10 years, it is very difficult to choose one single event that was the most pivotal for commercializing 3D integration technology. There have been many prior events that have driven 3D integration and aligned the whole industry in migrating from monolithic 2D to heterogeneous and 3D integration. From my perspective, the most path-breaking event was the rise of the backside... »

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Breakthroughs in 3D Stacked FinFETS and 3D Sequential Integration

The annual International Electron Devices Meeting (IEDM) presents the latest developments in electronic device technologies focused on advanced scaling, heterogeneous integration, quantum computing, and wide bandgap devices. Among several excellent papers on 3D integration were two papers on 3D sequential integration, long the holy grail of 3D integration because of the promise of up to 50% logic-... »


3D ICs Eliminate the Memory Wall

The adoption of 3D ICs allowed the elimination of the “Memory Wall” using a new memory architecture and through silicon via (TSV) technology. While individual ICs became faster with each process node, the communication between the chips was constrained by limited pin counts, power hungry I/Os, and PCB-space limitations. Assembly of multiple dies into one package enables extremely wide busses b... »

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Probe Test for 3D Integration: A Thousand Mile Journey

When we look back at the last 10 years, it’s really been a series of baby steps to move the commercialization of 3D integration technologies forward. There is no single pivotal event that catalyzed the 3D evolution. Like the Chinese philosopher, Lao Tzu said, “do the difficult things while they are easy and do the great things while they are small. A journey of a thousand miles begins with a s... »

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