Semiconductor foundries are accelerating their offerings for advanced packaging. This sea change in the advanced packaging market brings several important new solutions to the industry as well as significant design and analysis challenges for the packaging engineer. Many packaging professionals are becoming aware that the typical design flows used today for BGA packages have gaping holes when targeting the newer 2.5D-/3D-IC packaging technologies. Get an overview of the trends and advancements for foundry-based 2.5D-IC, 3D-IC, and FOWLP solutions. Learn about the challenges and benefits of the modernized design flow for foundry-based packaging.
Speaker John Park, Cadence Design Systems
John Park brings over 35 years of design and EDA experience to his role as Product Management Director for Advanced Semiconductor Packaging at Cadence Design Systems. In this role, John leads a team responsible for defining cross-domain solutions and methodologies for IC, package & PCB co-design and analysis.
Registration Details:
Registration is FREE for IMAPS members and students.
Non-member registration is $50.
Wednesday, June 17, 2020 | 12:00pm – 12:45pm EASTERN | Webex
