10/23/2018 - 10/25/2018 -All Day

Location: DoubleTree by Hilton Hotel

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Early Registration for the 15th Annual IWLPC Conference Ends September 28, 2018

Join industry leaders, technologists, and innovators at the 15th Annual International Wafer-Level Packaging Conference & Exhibition (IWLPC). Held in San Jose, CA, the IWLPC continues to be the premier semiconductor packaging conference and exhibition focused on wafer-level packaging. This year’s conference theme, “Driving an Interconnected World,” emphasizes the growing importance of advanced wafer-level interconnect technologies to enable advanced system-level packaging solutions for applications such as automotive, communications, and high-performance computing. The IWLPC provides a dynamic environment for learning, networking, and technical exchange. This year’s conference comprises three major parts: the technical program, the workshops, and the technology exhibition. The technical program has three parallel tracks with two full days of presentations on wafer-level packaging, 3D integration, and advanced manufacturing technologies.

Keynote Presenters include:

  • Growth of WLSI and Wafer Foundry with Moore’s Law and More-than-Moore, and Vice Versa
    Douglas C.H. Yu, Ph.D.
    Vice President, Research & Development
    Taiwan Semiconductor Manufacturing Company (TSMC)
  • Monolithic versus Heterogeneous Packaging:¬†Where Does the Future Lie?
    Walden Rhines, Ph.D.
    President and Chief Executive Officer
    Mentor, a Siemens business
  • Interconnected World and the Automotive Paradigm
    Veer Dhandapani, Ph.D.
    Head of Automotive Packaging
    NXP Semiconductors

Panel Discussion:

What is the Sweet Spot for Large Area (Panel) Packaging?
Moderators:
Tanja Braun, Fraunhofer IZM
E. Jan Vardaman, TechSearch International, Inc.

Visit the IWLPC website to learn more