Advancements in Carbon Nanostructures for Advanced Packaging Applications

Moore’s law has guided the continuing miniaturization and performance enhancements of silicon chips for the semiconductor industry by scaling the transistor size. After 50 years, the industry is now witnessing a paradigm shift, where application-driven evolution is replacing transistor-scaling-driven evolution. In the digital circuit world, reprogrammable chips are becoming more prominent over static chips and 2.5D and 3D stacking is replacing 2D integration to reduce the overall footprint and cost. And last but not least, chip making is shifting to comply with the strong needs of self-contain ability that is driven by Internet of Things (IoT). The bottom line is that there is a strong need for a technological shift from the trend of scaling the transistors to the reduction of the size of an electronic package.

To gain significant cost and performance benefits from shrinking further, it is necessary to improve the technology around electronic packaging solutions, which leads to the need for an advanced wafer level packaging platform. However, while some OEMS are willing to pay a premium to shrink the overall size of the package to gain crucial millimeters and make their phones slimmer and more elegant, electronic package scaling faces a bottleneck when it comes to shrinking the size of the metal pillars/interconnects. Enter the possibility of using carbon nanostructures to eliminate this bottleneck.

The superiority of carbon nanostructures is well known but growth temperatures have prevented industrial integration. Smoltek has developed a core technology that involves deposition of one or more layers on a substrate to engineer the growth of carbon nanostructures to specifications and/or to protect the underlying device layer or the combination thereof. The process has so far proven to work down to 375ºC making it compatible with CMOS compliant materials and processes. This white paper describes how this technology can fulfill the need for a performance boost, higher functional integration, and smaller package size at an attractive cost to performance ratio for product evolution beyond Moore.

Download the paper, Introducing Smoltek Tiger™ here.