For the first time this year, 3D InCites is sponsoring a panel discussion at  IWLPC on the topic of System-level Advantages of 3D Integration. For years the industry has discussed and debated 3D integration technologies, discussing the market drivers, technology challenges, supply chain issues, and above all, the cost. As the roadmaps continued to be pushed out, manufacturers, suppliers, and R&D centers have addressed these concerns, and foundries and OSATS have declared themselves ready to ramp production. But still, commercialization lags, waiting for system-level integrators to design in 3D ICs.

In this panel, system-level integrators and manufacturers will face-off in a discussion about the system-level advantages of 3D IC, whether 3D ICs can solve the issues of SoC design complexity and the cost of CMOS scaling to future nodes. There will be no presentations by the panelists. Rather, the audience will participate in a real-time poll to gauge current industry understanding of these advantages, and the panelists will be invited to present their perspectives on the same polling questions. The panel takes place Tuesday, November 11, 2014, 1:15pm – 2:45pm, int the Oak Ballroom at the DoubleTree Hotel in San Jose.

Moderated by Francoise von Trapp, Queen of 3D, the panel includes:

  • Belgacem Haba, Google
  • Mike Gianfagna, eSilicon
  • Simon McElrea, Energous Corp.
  • Bob Patti, Tezzaron Semicounductors
  • Ramakanth Alapati, GlobalFoundries
  • E. Jan Vardaman, TechSearch International, Inc.

Haba and Gianfagna represent the system integrators. McElrea and Alapati represent the manufacturing perspective. Patti brings perspective from both the chip/system design side and manufacturing, and Beica and Vardaman will balance out the panel, providing the market analyst perspective. We are looking forward to a lively, interactive discussion.

Meet the Panelists
haba2Dr. Belgacem Haba joined Google Data Center Platform as a senior staff in 2013. Prior he was VP and Senior Fellow at Tessera/Invensas since 1996. His latest activities while heading the Mobile R&D division include developing 3D technologies for mobile devices and servers. Dr. Haba also co-founded SiliconPipe Inc. in 2002, a high-speed interconnect start-up company based in Silicon Valley that was acquired by Samsung. Prior to that, he managed the advanced packaging R&D division at Rambus. And from 1991 to 1996, he worked for the NEC Central Research Laboratories in Tokyo Japan and, before that, for IBM Watson Research Center in New York.

Dr. Haba holds a Ph.D. in materials science and engineering in 1988 from Stanford University, CA in the field of solar energy. He obtained also two master’s degrees in applied physics and materials science and both from Stanford University. And he received his bachelor’s degree in physics from the University of Bab-Ezzouar, Algeria in 1980. Dr. Haba holds 270+ US issued patents, has authored numerous technical publications, and has also presented at conferences worldwide.

Mike Gianfagna photoMike Gianfagna, Vice President, Marketing, eSilicon Corporation has over 30 years of business and technology experience in semiconductors and EDA. Prior to eSilicon, Mr. Gianfagna was vice president of corporate marketing at Atrenta, Inc., a privately held EDA company and CEO of Aprio Technologies, a venture-funded design-for-manufacturability startup. He has also held senior management positions at Cadence Design Systems, Zycad Corporation, General Electric and Harris Semiconductor (now Intersil).

His career began at RCA Solid State, where he was part of the team that launched the company’s ASIC business. He holds a BS/EE from New York University and an MS/EE from Rutgers University.

SimonSimon McElrea is Corporate Vice President at Energous™, a San Jose based pioneer in wireless charging technology. Prior to Energous, McElrea was President and Founder of Invensas Corporation, a subsidiary of Tessera Inc., where he also served as CTO. McElrea built Invensas into a global leader in semiconductor interconnect technology and IP licensing, a pioneer in 3D-IC, and the primary source of Tessera’s growth.

A serial Tech. Entrepreneur, McElrea has served in executive roles at Vertical Circuits, Amkor Technology, Honeywell, and Johnson Matthey, where he has led the creation and commercialization of businesses ranging from Zero Emission Vehicle fuel cells, to Mobile wireless charging. An author of over 50 US patents, McElrea holds Bachelor’s and Master’s degrees, with honors, in Engineering and Management from Oxford University, England.

alapatiRamakanth Alapati is leading the Package Architecture and Customer Technology group focused on delivering package differentiated solutions. Rama led the 3D TSV technology startup in GLOBALFOUNDRIES Fab 8 for sub-20nm nodes. He was also responsible for Sub-20nm CPI qualification until recently. Rama represents GLOBALFOUNDRIES in consortia like imec, SRC and SEMATECH to drive packaging focused research programs. Prior to joining GLOBALFOUNDRIES, Rama was with Micron Technology for 8 years first as an etch engineer focused on pitch doubling technology for sub-50nm NAND and later on as a assignee at imec focusing on 3D-IC and BEOL integration.

Rama graduated with Master of Science (Honors) in chemical engineering from the University of Kansas, Lawrence and prior to that received his Bachelor of Technology degree with distinction from Osmania University in Hyderabad, India.

JustBobBob Patti, CTO, Tezzaron Semiconductor Corp. earned BS degrees in both physics and electrical engineering from Rose-Hulman Institute of Technology. In 1987 he founded ASIC Designs Inc, an R&D company specializing in high-performance ASICs and systems including laptops, handheld mobile communication systems, and aircraft telephone systems. Tezzaron Semiconductor grew from that company to become a leading force in 3D-IC technology. Its first working 3D-ICs emerged in 2004; today it creates cutting-edge memories and other semiconductor sub-components in both 3D and 2.5D. Bob received the SEMI Award for North America in 2009, served as Vice-Chairman of JEDEC’s DDRIII / Future Memories Task Group, and holds 14 US patents, numerous foreign patents, and many more pending patent applications in deep sub-micron semiconductor chip technologies.


E. Jan Vardaman, TechSearch InternationalE. Jan Vardaman founded TechSearch International Inc. in 1987, and since then has provided licensing and consulting services in semiconductor packaging. She is the co-author of How to Make IC Packages (published in Japanese by Nikkan Kogyo Shinbunsha), a columnist with Circuits Assembly/Printed Circuit Board Fabrication, and the author of numerous publications on emerging trends in semiconductor packaging and assembly. She is a member of IEEE CPMT, SMTA, MEPTEC, IPC, IMAPS and SEMI. She was elected to two terms on the IEEE CPMT Board of Governors. Before founding TechSearch International, she served on the corporate staff of Microelectronics and Computer Technology Corporation (MCC), the electronics industry’s first pre-competitive research consortium. She has made numerous presentations on developments in advanced packaging.

Francoise von Trapp

They call me the “Queen of 3D” because I have been following the course of…

View Francoise's posts

Become a Member

Media Kit