Glass interposers got a thumbs up from i-MicroNews in a “Closer Look” post reviewing Corning’s Peter Bocko’s presentation at IMAPS 2012.  Based on work done as part of Ga Tech’s consortium, Bocko demonstrated that “glass interposers show less warp during chip assembly, faster signal propagation and significantly reduced signal loss.  In fact they found a 10x lower signal loss in glass for a 6x longer interconnect. Such a 60x lower leakage improves power efficiency,” Not a lot of words but lots of slides from the presentation are posted. In the conclusion, the writer endorses glass, saying “The combination of excellent electrical performance and large panel processing capabilities make glass a strong contender for 2.5D interposer substrates in the future.” Interested in learning more? Bocko will also be presenting his findings at GIT 2012.

In an ongoing campaign promoting the benefits of monolithic 3D ICs, Ze’ev Wurman, MonolithIC 3D Inc.’s Chief Software Architect, takes on EUV lithography and TSVs in his post, Who Will Be the Winners?  Wurman throws out such provocative statements as “Despite the impressive progress shown by ASML, the industry greats – Intel, Samsung, and TSMC –banding around EUV is possibly more a sign of desperation than a strong vote of confidence”, “3D ICs in older processes (65nm) is better than 2D IC with newer process (32nm)” and “while TSVs are good for designs that need limited vertical connectivity between disparate sub-systems such as processors with memory, they do not really open the door to a true monolithic 3D design.” Alternatively, he notes that true monolithic 3D devices offer higher vertical interconnectivity and enable the stacking of multiple die, and continues on to talk about the benefits of monolithic 3D in various applications.

The much raved about embedded wafer-level ball grid array (eWLB) fan-out wafer level package (FOWLP) is finally 3D newsworthy.  In a technology feature posted on Solid State Technology, Seung Wook Yoon and Steve Anderson of STATS ChipPAC suggest that an eWLB can be used in a 2.5D configuration by replacing the TSV interposer with eWLB. eWLB also works well in a package-on-package (PoP) configuration, and getting even fancier, as a double-sided eWLB or 3D system-in-package (3D SiP). Don’t believe me? Check out the story hear and see all the great diagrams for yourself. I’m looking forward to catching up on this technology myself at IWLPC next week.  ~ F.v.T.

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