Francoise von Trapp

They call me the “Queen of 3D” because I have been following the course of…

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I got into an interesting conversation recently with Steve Dwyer, of EV Group, about the puzzling situation 3D IC integration is posing with regard to existing Semi Standards, and those yet to be established as 3D IC integration processes are developed.

Take, for example, the standard for wafer handling. Dwyer explained that the current standard calls for a process wafer to be returned to the same slot in the FOUP where it came from. But with temporary bonding for thin wafer handling, the input comes from two separate FOUPs, and the output is the two wafers bonded together, so one FOUP winds up with an empty slot, thereby breaking the standard for handling wafers. Clearly, the standard was set based on single wafer processes, and didn’t consider future possibilities of multiple wafers being combined into a single processed wafer.

Additionally, when it comes to establishing standards for 3D IC integration processes, all the different processes being developed — via-first, via-early, and via last; front side approaches vs. back-side approaches; wafer-to-wafer, chip-to-wafer and chip-to-substrate — will need to be considered.

So what’s the hurry? Is the establishment of standards for 3D IC integration critical for market adoption to take place? Would it be better to hold off until the processes shake out and we see what sticks? Consider also that if multiple approaches are adopted, then standards will need to be set to accommodate different options. “Until the industry works out what it wants to do, we need the flexibility,” notes Dwyer.

I posed this question to Sitaram Arkalgud of SEMATECH’s 3D interconnect program, and Rich Brilla, of the College of Nanoscale Science and Engineering (CNSE) at the University at Albany. Brilla noted that in addition to standards focused on equipment and processes, design ground rules are also needed. For example, knowing where alignment marks should be for wafer to wafer and chip to wafer processes is critical. Part of the work being done by SEMATECH at CSNE will help to establish these standards.

“It takes ages for standards to come together. It’s a voyage of discovery,” notes Arkalgud, adding that this work-in-progress approach to standards is still better than having nothing at all. “3D can revolutionize the industry, but needs standards in order to make it happen, otherwise it will delay the adoption of technology,” he said; a sweeping statement perhaps, but his point is well taken. Without standards to bring the technology to high volume, it runs the risk of just being a niche market. – F.v.T.