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Francoise von Trapp (aka the Queen of 3D) has been following and reporting on the progress of 3D integration technologies since 2009. Francoise in 3D provides a high-level perspective of 3D industry events, offers executive viewpoints, and focuses on process and manufacturing aspects of 3D integration.

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How Jessica Gomez Short-Circuited Her Way to CEO: A SemiSister Success Story

The number is sobering: according to the U.S. Bureau of Labor of Statistics, 16.9% of chemical engineers and 12.3% of electrical/electronics engineers in the US are women. For racial diversity, the situation is even worse. These grave statistics came to light during a recent panel discussion during SEMICON West, in its Workforce Pavilion. Here, Jessica Gomez, co-founder and CEO of Rogue Valley Mic... »

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It’s not the Data, it’s what you DO with it; and Other Conversations from SEMICON West 2018

Emerging technologies like artificial intelligence (AI), machine learning (ML) are driving more than just the semiconductor market. They also drove the conversations I had with everyone I spoke with at and around SEMICON West 2018. Turns out people had lots to talk about. AI and Machine Learning I often think back to the 2010 MEMS Executive Summit in Scottsdale Arizona, when Karen Lightman declare... »

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Volumes Matter and Other Conversations from SEMICON West 2018

The world wants intelligence in everything, especially things that aren’t nailed down like autonomous cars, and the internet of things (IoT) devices. And suddenly, semiconductors are the hottest game in town. Here’s how some of these trends are impacting suppliers that I spoke with at SEMICON West. The importance of purity While Entegris is agnostic to megatrends, Jim O’Neill, CTO, still... »

Why We need Lower Cost TSVs and How to Get Them

Through-silicon vias (TSVs) have been firmly established as a method of interconnect that enables high bandwidth and low latency between dies at extremely low power dissipation. Used for years in microelectromechanical systems (MEMS), compound semiconductors, and image sensors, TSVs are now also in mainstream production for 2.5D interposer technologies, and for stacking die to create high-bandwidt... »

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What Should Replace “2.5D” in the Heterogeneous Integration Nomenclature?

The people have spoken! The results of last week’s poll are in, and it looks like the majority of those who participated think we should keep it simple. When it comes to heterogeneous integration nomenclature for package architectures, it should be 2D or 3D. The Back Story The term “2.5D” has been a topic of debate in the advanced packaging world ever since it was first added to the industry... »

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SEMICON West 2018: Smart Starts Where?

Well, that was interesting. SEMICON West 2018 just wrapped up, and I’m not quite sure what just happened. This year’s event was… for lack of a better word… different. All I could think of as I looked around the Moscone Center upon arrival was “ready or not, SEMICON West 2018 is here, emphasis on ‘or not.’” While I generally endeavor to paint a rosy picture, I have to remember that ... »

3D InCites Top Picks for SEMICON West 2018

Ok folks. It’s that time of year again. SEMICON West 2018 is upon us. By the time you read this – IF you get the time to read this – it’s almost curtain time. Everything that needs to be prepped is done, and if it’s not, it’s too bad, because the show will go on! It seems like every year, there’s more and more content to choose from. And you must choose because it’s pretty much... »

Are you Team 3D, 2.5D or 2DS/2DO?

The Heterogenous Integration Roadmap Committee wants to create a new nomenclature that does away with 2.5D. Instead, the industry will refer to 2D, 2D enhanced (formerly 2.5D) and 3D architectures. 2D enhanced will be further categorized as 2DS (silicon substrate) or 2DO (organic substrate). We want to know your opinion. After you vote, please stop by booth 2330 in the South Hall during SEMICON W... »

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An Update on the Fan-out Panel-Level Packaging Consortium

One topic that has been under hot debate in the semiconductor advanced packaging sector for the past few years is fan-out panel-level packaging (FOPLP).  In theory, the concept of taking fan-out from a 300-mm reconstituted wafer to a large panel format as a way to lower costs seems simple, and even the logical step. It’s not. Skeptics, many burned by the same low-cost advantage argument for inv... »

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Transforming the Fan-out Landscape

These days, the first thing that comes to mind when someone mentions fan-out (FO) technology is Apple’s A10 processor built on TSMCs integrated fan-out (InFO) technology. It’s the superstar application that put FO on the map and into high volume manufacturing. However, equally important to remember are the numerous low-density FO workhorses supporting other mobile applications, as well as mark... »

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