ECTC 2018 Paves the Path to Heterogeneous Integration

ECTC 2018 Paves the Path to Heterogeneous Integration

For nine years, my fellow 3D InCites bloggers and I have been evangelizing about the wonders the microelectronics industry can achieve with innovations in 3D, advanced packaging, and other heterogeneous integration (HI) technologies. Based on the turnout at this year’s IEEE Electronics Components and Technologies Conference, which took place May 29-June 1 in San Diego, CA, it would appear that the rest of the industry is finally in agreement.

Numbers don’t lie: a record 1756 attendees from 28 countries showed up to take part in 36 oral presentation sessions and five interactive poster sessions, totaling 369 papers. Additionally, there were five special technical sessions tackling the design and packaging challenges posed by a plethora of drivers including artificial intelligence (AI), wearables, medical devices, autonomous vehicles, and more.

Women in Engineering Encouraging Others
Beyond the technology-focused agenda, one of the highlights of the week was the annual women’s panel and reception, this year focused on how to enhance women’s participation in engineering around the globe. Both men and women attended this event, and many reported being enlightened by the panelists’ stories of their respective career paths.

To kick off this event, Jan Vardaman, Techsearch International Inc. announced that the IEEE Frances B. Hugle Engineering Scholarship, which her company spearheaded in 2013, is fully funded and will begin awarding annual scholarships in the amount of $2500 to young women who have completed at least two years of a university-level engineering program, while maintaining a 3.7 GPA or better.

Jan thanked all who had donated over the years. 3D InCites is proud to be among them for donations from the proceeds of three consecutive 3D InCites Awards programs for a total of $10,000. In this video, the family of Frances B. Hugle extends their heartfelt thanks.

Venky Sundaram, Chintan Buch, and Rao Tummala (left to right) accept the inaugural ‘Corning Leadership in Glass Award’ at ECTC 2018. (Photo courtesy of Corning Glass)

Recognizing Leaders in Glass
In an invitation-only ceremony and reception held on Tuesday evening, Corning Glass awarded its first Corning Leadership in Glass Award to a team led by researchers at Georgia Institute of Technology for their collaborative work culminating in the paper, “Design and Demonstration of Highly Miniaturized, Low-Cost Panel-Level Glass Package for MEMS Sensors.” 

Chintan Buch of Applied Materials, and Venky Sundaram, and Rao Tummala of Georgia Tech, accepted the award on behalf of the team, which included  Daniel Struk, Klaus-Jürgen Wolter, Peter J. Hesketh, Georgia Tech; as well as Catherine Shearer and James Haley from EMD-Performance Materials, Mel Findlay of KWJ Engineering Incorporated, and Marc Papageorge of SPEC Sensors, LCC.

Focus on Heterogeneous Integration
If the session titles sprinkled throughout the proceedings weren’t a clue, it became crystal clear from day one that the week was going to be all about HI. I’m not just talking about your garden variety advanced packaging system-in-package (SiP) and interposers type of HI. We’re talking full-blown heterogeneous system integration of single and multi-chip packages, photonics, power electronics, MEMS and sensor integration, and RF and analog mixed-signal components.

ASE’s Bill Chen, accompanied by his family, is presented with the prestigious 2018 IEEE Electronics Packaging Award at ECTC. (photo courtesy of ASE Group)

Why? Because, in the words of Bill Chen, ASE, “The world has changed, and we are responding to the changing world!” Chen heads up the Heterogeneous Integration Roadmap Committee, which formed in 2016 after the ITRS Roadmap wound down. He was awarded this year’s prestigious IEEE Electronics Packaging Award for contributions from R&D through industrialization and leadership in strategic roadmapping for HI. I interviewed Chen about the HIR. More on that soon.

When you think about it, HI is way more complicated than scaling to smaller CMOS nodes. The multi-physical mix of materials, shapes, and sizes being considered impacts everything from system design through assembly, so the microelectronics industry has its work cut out for them.

Over the next few weeks,  I’ll be sharing observations gleaned from conversations I had at ECTC 2018 with attendees and industry experts, as well as highlights of the special sessions and plenary talks I attended. I’ve been told many of you rely on these posts to fill out your executive summaries required by your bosses. You’re welcome to share my perspective but be warned: this blog series won’t be a deep dive into the details of the 370 papers that were presented. For that, you’ll have to rely on your own notes. ~ FvT

PS; Thanks to Paul Werbaneth for the feature photo of the elevator doors.