As my first official week blogging about 3D IC packaging technologies winds down, I’m thinking a Friday wrap-up is in order, and should probably become a regular event. (Being a fly-by-the-seat-of-your-pants kind of person, it’s only natural that this blog takes shape as the opportunities present themselves, don’t you think?)
Trolling the web for 3D info this morning, I unearthed what I consider to be some noteworthy points of interest. First of all, I found out that NEXX Systems has become a member of SEMATECH’s 3D Interconnect Program at the University of Albany’s College of Nanoscale Science and Engineering. Specifically, the collaboration will focus on developing high-yield, low-cost copper electroplating processes to enable high-density TSVs. Another thumbs-up for the effectiveness of collaboration.
Next, Ziptronix announced it is developing licensing sGtrategies for it’s ZiBond low-temperature covalent bonding and DBI direct bond interconnect technologies across the supply chain, because according to CEO Dan Donabedian, each link in the chain including EDA tool venders, equipment manufacturers, OEMS, IDMS, chip manufacturers and foundries, stand to gain something from these processes. Look for an in-depth interview on these developments next week.
Two additions to the event calendar include MEPTEC’s Semiconductor Packaging Symposium, which, among other things, touches on latest developments in 3D technologies that have made it to full production: PoP stacks, and TSV for CMOS image sensors; and EMC3D Consortium’s Asia Tour, which will focus on latest advancements in 3D integration using TSV technology from trends and roadmaps, to performance requirements, cost-effective applications and more.
And finally, while she says it’s not “new” news, Gretchen Patti, of Tezzaron Semiconductors, passed along an interesting paper she penned that’s worthy of attention as it touches on an advantage of 3D ICs that I had yet to see listed among the usual laundry list of benefits. Evidently, by nature they offer security benefits in two ways. Due to the layered manufacturing processes, their circuitry is virtually impossibly to decipher during manufacture, and fully assembled 3D ICs defeat reverse engineering. For the full story, download 3D-ICs and Integrated Circuit Security. – F.v.T