White Papers

3D IC System Verification Methodology: Solutions and Challenges

3D IC System Verification Methodology: Solutions and Challenges

By Dusan Petranovic, Member, IEEE, and, Karen Chow, Member, IEEE, (Mentor Graphics) The three largest EDA companies are taking an evolutionary, rather than a revolutionary, approach in developing the 3D IC design tools. This appears to be a good decision because the technology, the rules and the standards are still evolving. The main EDA challenges are expected in the design space exploration [6]... »

A Comparative Simulation Study of 3D TSS Assembly Processes

A Comparative Simulation Study of 3D TSS Assembly Processes

A memory stack on logic 3D TSS stack was considered for comparative study of warpage response to two different process choices, namely, Die to Die (D2D) and Package to Die (P2D) assembly. Process and reliability modeling software CielMech, and Commercial Finite Element Analysis (FEA) software ANSYS Mechanical were utilized to simulate thermo-mechanical effects of sequential chip attach, underfilli... »

Scaling 100G Wired Applications with Heterogeneous 3D FPGAs

Scaling 100G Wired Applications with Heterogeneous 3D FPGAs

By: Ehab Mohsen, Xilinx To address the insatiable demand for bandwidth, the communications industry is accelerating development of Nx100G line cards for networking systems. In order for equipment manufacturers to scale infrastructure economically and effectively, they must leverage the latest optical interconnect technologies, suh as CFP2 and in the future CFP4, to increase bandwidth while lowerin... »

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