Executive Viewpoint: Executing a 3D Supply Chain eSilicon Style

Executive Viewpoint: Executing a 3D Supply Chain eSilicon Style

While the traditional foundry/OSAT supply chain has worked for fabless semiconductor manufactures engaging in the manufacture, package, and test of 2D architectures, it’s well understood that a 3D supply chain requires something different. 3D architectures bring new issues to the table such as yield management, sourcing from different suppliers, who tests what, who owns what, how do you make sure your interconnect methodologies work together, and so forth. So when I heard Mike Gianfagna, vice president of marketing at eSilicon, describe the company’s business model during his introduction at the 3D InCites Panel at IWLPC earlier this month, my ears perked up. What he described seemed to be exactly what the industry has been clamoring for. I sat down with Gianfagna and other members of eSilicon’s executive team, Patrick Soheili, vice president, product management and corporate development; and Javier DeLaCruz, senior director of engineering, to learn more.

DeLaCruz describes the company as “a general contractor for design and manufacturing of silicon chips”. They work with end-users to realize custom chip designs from concept to delivery of volume silicon. The way Gianfagna describes it is this: “We coordinate the supply chain, figure out the right IP, the manufacturing process, the right vendors, and provide our customers with one chokable neck.” Essentially, they deal with the complexity of the supply chain and deliver the product to the customer at a pre-negotiated price.

How does eSilicon differentiate itself from a design house? eSilicon considers itself a super-set of a design house with an end game of shipping quality, high yield products. “We are a delivery mechanism for the major players. OEMs are getting into the chip business. We fill the gap between fabless companies and OEMs,” says Soheili “We are an equalizer so that customers can get what they need in an unfiltered way.” They do this by not taking money from the capital structure, thereby not forcing customers to go down one path. This independence allows them to work with any foundry, OSAT, memory and ASIC supplier. In fact, according to Soheili, eSilicon works with all the foundries and OSATS. “We win by giving the best in power/performance to our customers,” he noted.

eSilicon has been implementing its model to provide system-in-package (SiP) solutions for some time. Procuring die from different sources is already common practice. While not designed specifically for 3D integration, it certainly appeals to the needs of that particular market space. The company has positioned itself as a system integrator for interposer/3D devices with its MoZAIC ™ (stands for Modular Z-Axis IC”) concept. MoZAIC is a custom logic design approach that customizes the base layer while keeping key, proven blocks the same, accessing a library of “tiles” eSilicon assembled with its ecosystem partners. The non-recurring engineering (NRE) is kept low because the base layer can be built in an older process, while top-layer functions reuse already proven silicon.

At last year’s 3D ASIP conference, DeLaCruz presented a heterogeneous organic interposer device developed using MoZAIC that targets networking and super computing applications. Because this market segment doesn’t have the same size limitations as the mobile market, a large size organic interposer that is routed as densely as silicon creates a lower cost, easier to handle solution.

DeLaCruz says he sees eSilicon’s interposer technology addressing more of the infrastructure for networking and high-performance applications. “We can optimize the system to be lower cost and power,” he noted. “We’ve also been active in the 3D memory space, as well as focusing on the small mobile market with heterogeneous 3D for low power.” He says the memory manufacturers come to them to get very deep into technologies that would be difficult for them to get their arms around. As such they’ve been actively involved working with 3D memory on behalf of their customers.

While most chip designers are still trapped in the world of constraints they have known, eSilicon has found a path to break free of these barriers. They have taken the checklist of things people are most afraid of and figured out how to optimize them in a way that works. This bodes well as the market for interposers and 3D integration continues to be defined. ~ F.v.T.