When we talk about 3D integration, we’re generally talking about 3D ICs driven by mobile market performance needs. But in the power semiconductor market, computing application performance needs are also spiking due to the increase of content like broadband mobile video and 4G communications. At the same time, telecommunications and computing equipment needs to take up less space, notes TI spokesman Matt Romig. TI’s solution is to stack MOSFETs vertically, rather than in the traditional side-by-side configuration, representing a true transition from 2D to 3D integration.  Granted, PowerStack technology has been around for almost a year, but the company recently announced reaching high volume manufacturing and is picking up steam across a range of power devices.

According to market analyst, Jan Vardaman, of TechSearch International, TI’s PowerStack technology is the first 3D packaging technology she’s seen in the power arena. She noted increased momentum in 3D packaging overall, and says this technology addresses current and next-generation design challenges in this market.

According to Romig, this  technology’s benefits are achieved through an innovative packaging approach where TI’s NexFETTM power MOSFETs are stacked on a grounded lead frame, using two copper clips to connect the input and output voltage pins. This unique approach combines both high side and low side MOSFETS and leverages a ground potential exposed pad to provide significant thermal optimization, resulting in a more integrated quad flat no-lead (QFN) solution (figure1).

TIpowerstack

Figure 1: Combined stacking and clipping techniques are said to provide significant benefits over traditional side-by-side discrete MOSFETs.

Romig explained that what is unique in this technology is the packaging. The vertical configuration creates a differentiation in the market regarding the role in packaging relative to silicon, system-in-package (SiP), and multichip modules. Typical PCB power management uses a pair of MOSFETS in which the high side connects from the inner voltage to the outside.  Vertically stacking the MOSFETS closer together, eliminates parasitic impedence, current loss and mismatch.  Although this technology isn’t suited to CMOS die, explained Romig, the improved performance is comparable to the improved performance of stacking memory on logic with through silicon vias (TSVs)

Another packaging technology “first” with this technology, noted Romig, is the use of TI’s proprietary NexFET technology.  “NexFETs can be flipped over, putting the drain on top and source on bottom or vice versa, competitive technologies can’t do that.” He explained. “We’re stacking in a way that is not easy for other technologies to accomplish.” Stacking vertically rather than side by side has resulted in a 50% reduction in board space consumption; 20% reduction in power consumption; and temperatures are reduced by more than 30% because it leverages the best thermal plane on the board. Additionally, the process leverages existing QFN process infrastructure and economies of scale. Currently, there are four TI product families that have integrated PowerStack.  Switching Integrated FETS (SWIFT) contain 2 vertical MOSFETS  plus a controller for controlling the switching of the MOSFETS. The NexFET Power Stage includes 2 vertical MOSFETS plus a simpler gate drive IC.  And the NexFET Power Block, available in 10mm2 and 30mm2 package options, include just a stacked MOSFET pair.  Each of these packages represent a family of products suited to different applications and performance levels.

According to Romig, the natural and early adopters of this technology has been the telecom market, data centers, cloud computing base stations, desk tops and servers; basically anything that is running power.  It has reached volume production at Clark, the company’s new state-of-the-art assembly/test facility in the Philippines, and according to Bing Viera, managing director of TI Philippines, there are plans to expand capacity to almost double the initial capacity for advanced packaging techniques at Clark by the third quarter of 2011.

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