Implementing Fan-Out Wafer-Level Packaging (FOWLP) with an HDAP Flow

Implementing Fan-Out Wafer-Level Packaging (FOWLP) with an HDAP Flow


September 21, 2017    MentorPCB

Fan-out wafer-level packaging (FOWLP) is an emerging type of high-density advanced packaging (HDAP) technology in the semiconductor industry that is rapidly gaining popularity in the

UnitySC Opens Global Software Development Center and Customer Demo Lab in the U.S.

UnitySC Opens Global Software Development Center and Customer Demo Lab in the U.S.


October 23, 2017    UnitySC

Austin, Texas – Oct. 23, 2017 – UnitySC today announced at the International Wafer Level Packaging Conference (IWLPC) in San Jose, Calif., the opening of

Sir Walter Raleigh towered above the 50th IMAPS Symposium

Sir Walter Raleigh towered above the 50th IMAPS Symposium


October 19, 2017    Herb Reiter

Almost 500 years ago Walter Raleigh was born in England, rose rapidly in the favor of Queen Elizabeth I and was knighted in 1585. In

imec and Analog Devices Sign Strategic Research Partnership for Development of Next-Generation IoT Devices

imec and Analog Devices Sign Strategic Research Partnership for Development of Next-Generation IoT Devices


October 16, 2017    imec

LEUVEN, Belgium, and NORWOOD, MA —October 12, 2017—Imec, the world-leading research and innovation hub in nanoelectronics and digital technologies and Analog Devices, Inc. (ADI), the

EV Group and SwissLitho to Develop Joint Nanoimprint Lithography Solution for 3D Optical Structures with Single-Nanometer Accuracy

EV Group and SwissLitho to Develop Joint Nanoimprint Lithography Solution for 3D Optical Structures with Single-Nanometer Accuracy


October 9, 2017    EV Group

EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, and SwissLitho AG, a manufacturer of

European Imaging and Sensors Summit: It’s Not Just About Pretty Pictures Anymore

European Imaging and Sensors Summit: It’s Not Just About Pretty Pictures Anymore


October 5, 2017    Francoise von Trapp

There’s no doubt about it. Imaging sensor technologies have come a long way since the introduction of the digital camera. In fact, according to Gartner,

EDPS 2017: NOT the usual Electronic DESIGN Process Symposium

EDPS 2017: NOT the usual Electronic DESIGN Process Symposium


October 4, 2017    Herb Reiter

When planning the 24th EDPS, the organizing committee, chaired by Shishpal Rawat, former Intel executive, took a number of bold steps EDPS was traditionally held

Spotlight on the European MEMS and Sensors Technology Showcase

Spotlight on the European MEMS and Sensors Technology Showcase


October 2, 2017    Francoise von Trapp

As it’s difficult to be in two places at one time, I was happy to see that the organizers of the co-located European MEMS and

Making Sense of MEMS and Sensors at the MEMS/Imaging Sensors Summits

Making Sense of MEMS and Sensors at the MEMS/Imaging Sensors Summits


September 27, 2017    Francoise von Trapp

Last week, I had a whirlwind trip to Grenoble, France: 3 days, 2 summits, and 1 supercool paragliding festival, Coupe Icare, on the side –

CEA-Leti Orders KOBUS Solution To Pursue Long-Term Partnership for Advanced CVD

CEA-Leti Orders KOBUS Solution To Pursue Long-Term Partnership for Advanced CVD


September 27, 2017    KOBUS Technology

Montbonnot, France, 20th of September 2017  ̶  KOBUS, a leading equipment supplier in advanced deposition solutions, and Leti, a technology research institute of CEA Tech,

TSMC’s OIP 2017 Symposium Shows The Awesome Power of an Ecosystem

TSMC’s OIP 2017 Symposium Shows The Awesome Power of an Ecosystem


September 20, 2017    Herb Reiter

Last week, September 13 to be exact, TSMC held its Open Innovation Forum (OIP 2017) Symposium at the Santa Clara Convention Center. Before getting into

 Integrated Solid-state Capacitors Based on Carbon Nanostructure 

 Integrated Solid-state Capacitors Based on Carbon Nanostructure 


September 20, 2017    Smoltek

The constant demand for miniaturization, added functionality and increased performance of electronic devices systematically drives higher integration by adding more devices on a single chip.

Samsung’s 8GB HBM2 Becomes a Standard for Innovative Graphic Cards

Samsung’s 8GB HBM2 Becomes a Standard for Innovative Graphic Cards


September 14, 2017    YOLE DEVELOPPEMENT

In the AMD-NVIDIA battle, System Plus Consulting’s experts continue to pursue innovation and monitor progress. At the beginning of the year, AMD was pleased to

Temporary Bonding and Debonding Technologies for Fan-out Wafer-Level Packaging

Temporary Bonding and Debonding Technologies for Fan-out Wafer-Level Packaging


September 14, 2017    Dr. Tony Flaim

Fan-out wafer-level packaging (FOWLP) is a cost-effective way to achieve high interconnect density and to manage larger I/O counts within an affordable package. It enables

EV Group Receives Multiple Lithography and Metrology System Orders for Wafer-Level Optics Manufacturing

EV Group Receives Multiple Lithography and Metrology System Orders for Wafer-Level Optics Manufacturing


September 14, 2017    EV Group

EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced it has received multiple

Fan-out Packaging Confirms its Success Story

Fan-out Packaging Confirms its Success Story


September 14, 2017    YOLE DEVELOPPEMENT

Fan-Out packaging solutions have been the hottest topic in the advanced packaging industry for two years, and that will remain true, announces Yole Développement (Yole). Will