Cost Comparison of Fan-out Wafer Level Packaging and Flip Chip Packaging

Cost Comparison of Fan-out Wafer Level Packaging and Flip Chip Packaging


March 27, 2017    Amy P. Lujan

In recent years, there has been an increased focus on fan-out wafer level packaging. While fan-out wafer level packaging may be the right solution for

Highlights of the 23rd TSMC Symposium

Highlights of the 23rd TSMC Symposium


March 21, 2017    Herb Reiter

On March 15, 2017, TSMC held its 23rd Symposium, based on popular request, at the Santa Clara Convention Center. I had the opportunity to attend

MRSI Systems Delivered 3-Micron Die Bonder to AIM Photonics Academy’s Education and Practice Factory at MIT

MRSI Systems Delivered 3-Micron Die Bonder to AIM Photonics Academy’s Education and Practice Factory at MIT


March 21, 2017    admin

North Billerica, MA, USA, March 20, 2017 — MRSI Systems, a leading provider of fully automated, high-speed, high-precision die bonding and epoxy dispensing systems, today

Executive Viewpoint: Next-Gen Drone Technologies Rely on Semiconductor Innovation

Executive Viewpoint: Next-Gen Drone Technologies Rely on Semiconductor Innovation


March 20, 2017    Francoise von Trapp

Robotics and drone technologies are one of the fastest growing end-use markets for integrated sensor technology today. According to a 2016 Yole Développement market report,

UnitySC Pushes The Boundaries of Measurement with New Nanotopography Metrology Platform

UnitySC Pushes The Boundaries of Measurement with New Nanotopography Metrology Platform


March 14, 2017    UnitySC

Grenoble, France, March 14, 2017 – UnitySC, a wholly owned subsidiary of FOGALE Nanotech Group and a leader in inspection and metrology solutions for advanced

Dev Gupta Disrupts the Fan-out Panel at IMAPS DPC, You Won’t Believe What Else Happened!

Dev Gupta Disrupts the Fan-out Panel at IMAPS DPC, You Won’t Believe What Else Happened!


March 13, 2017    Francoise von Trapp

Here we go again! One thing is for sure, there is never a dull moment at the IMAPS Device Packaging Conference panel sessions. (Remember the

EV Group Breaks Speed and Accuracy Barrier in Mask Alignment Lithography for Semiconductor Advanced Packaging

EV Group Breaks Speed and Accuracy Barrier in Mask Alignment Lithography for Semiconductor Advanced Packaging


March 8, 2017    EV Group

FLORIAN, Austria, March 8, 2017—EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today unveiled

The FAST route to the Top of the TSV Mountain

The FAST route to the Top of the TSV Mountain


March 8, 2017    Francoise von Trapp

. While on a recent visit to UnitySC in Grenoble, France, I spent some time visiting with a semiconductor process equipment company that shares the

What’s in Store For You at IMAPS DPC 2017

What’s in Store For You at IMAPS DPC 2017


March 1, 2017    Francoise von Trapp

Just under a week away, the agenda for the 2017 IMAPS Device Packaging Conference and co-located Global Business Council is geared to inspire attendees about

More-than-Moore 2.5D and 3D SiP Integration

More-than-Moore 2.5D and 3D SiP Integration


February 23, 2017    Riko Radojcic

A new book on 2.5D and 3D integration, written by Riko Radojcic and published by Springer, will soon be available. The book addresses the current

Finding The Next Switch for Semiconductor Scaling

Finding The Next Switch for Semiconductor Scaling


February 22, 2017    An Steegen

The data traffic explosion, fueled by the Internet of Things (IoT), social media and server applications, has created a need for ever-advancing semiconductor technologies. Servers,

Panel Level Packaging: One Size Fits All?

Panel Level Packaging: One Size Fits All?


February 16, 2017    Paul Werbaneth

There is an active and robust supply chain currently supporting these wafer sizes in the semiconductor manufacturing industry: 3”; 4”; 6”; 200mm; 300mm; and 330mm.

Using 3D Integration to Get the Heat Out

Using 3D Integration to Get the Heat Out


February 15, 2017    Francoise von Trapp

Thermal management is one of the last vestiges of 3D integration challenges. As such, the European 3D Summit (Jan 23-25, 2017) devoted its entire R&D

Highlights from the 2017 European 3D Summit

Highlights from the 2017 European 3D Summit


February 14, 2017    Francoise von Trapp

The 5th Annual European 3D Summit drew 220 attendees from 18 countries who gathered to understand the latest advanced packaging, 2.5D and 3D IC technologies

Process Control Gains Importance in Advanced Packaging Applications

Process Control Gains Importance in Advanced Packaging Applications


February 13, 2017    Tim Anderson

2016 will be remembered as the year fan-out wafer level packaging (FOWLP) went mainstream, thanks to TSMC’s strategic move in the advanced packaging arena and

The Edge of 3D: 3D SoC VLSI and Si Photonics

The Edge of 3D: 3D SoC VLSI and Si Photonics


February 8, 2017    Francoise von Trapp

Last week, I posted an executive summary of this year’s European 3D Summit, touching on the highlights and general takeaways based on the closing remarks