Seen on the Scene at Electronica 2018

Seen on the Scene at Electronica 2018


November 20, 2018    Francoise von Trapp

This was my first Electronica, and all I can say is – It is massive. It covered everything to do with the electronics supply chain,

Seen on the Scene at SEMICON Europa 2018

Seen on the Scene at SEMICON Europa 2018


November 20, 2018    Francoise von Trapp

SEMICON Europa was an island in the vast sea of Electronica. It occupied one hall out of 18. But without that hall full of equipment,

Designing and Integrating MCM/SIP Packages into Systems PCBs

Designing and Integrating MCM/SIP Packages into Systems PCBs


November 20, 2018    MentorPCB

The challenge of designing smaller, cost-effective systems that require additional processing and performance power led to 3D chip stacking of bare die and a new

Closing Out My 2018 Conference Season With SEMICON Europa and Electronica

Closing Out My 2018 Conference Season With SEMICON Europa and Electronica


November 19, 2018    Francoise von Trapp

In the past 10 weeks, I’ve attended five conferences: two in Europe, and three in California. Two focused on MEMS and sensors, two on advanced

IFTLE 398: Samsung’s 256Gb 3DS (TSV-Stacked) RDIMM; IMAPS 2018 in Pasadena

IFTLE 398: Samsung’s 256Gb 3DS (TSV-Stacked) RDIMM; IMAPS 2018 in Pasadena


November 15, 2018    Phil Garrou

Samsung at the Leading Edge At the recent Samsung Tech Day, the company unveiled several new technologies: Their 7nm extreme ultraviolet (EUV) process node from Samsung’s

UnitySC Unveils New Inspection System for the Advanced Packaging and Wafer Processing Ecosystem

UnitySC Unveils New Inspection System for the Advanced Packaging and Wafer Processing Ecosystem


November 13, 2018    Francoise von Trapp

Grenoble, France (November 8, 2018)— UnitySC European leader and a key player in inspection and metrology solutions, today launched the Unity_LIGHTiX ™ system for micro/macro

EDA Design Tools/Flows Targeting WLP Featured at IWLPC 2018

EDA Design Tools/Flows Targeting WLP Featured at IWLPC 2018


November 9, 2018    Herb Reiter

Wafer and panel-level packaging (WLP/PLP) offers technical and business advantages, compared to traditional IC packages. These cost-effective packaging solutions attracted more than 800 industry experts

The MSEC 2018 Technology Showcase: Who Owns the Data?

The MSEC 2018 Technology Showcase: Who Owns the Data?


November 6, 2018    Francoise von Trapp

The competition was fierce and the stakes high for the annual MSEC 2018 technology showcase. which took place during the MEMS and Sensors Executive Congress,

Wally Rhines Discusses the Importance of EDA and Design at IWLPC 2018

Wally Rhines Discusses the Importance of EDA and Design at IWLPC 2018


November 5, 2018    Herb Reiter

At this year’s International Wafer-level Packaging Conference, almost 1000 semiconductor experts from all parts of the supply chain gathered at the DoubleTree Hotel in San

MSEC 2018 Keynote Speaker Examines the Growing Importance of Cybersecurity

MSEC 2018 Keynote Speaker Examines the Growing Importance of Cybersecurity


November 2, 2018    Francoise von Trapp

Just over a year ago, Napa Valley was in flames, and the annual MEMS and Sensors Executive Congress (MSEC) had to be relocated from the

Talking Nerdy with Exhibitors at IWLPC 2018

Talking Nerdy with Exhibitors at IWLPC 2018


November 1, 2018    Francoise von Trapp

With heterogeneous integration, 3D, and advanced wafer-level packaging technologies officially declared the rising stars of the semiconductor industry, materials, process and equipment suppliers have pulled

IFTLE 397: Malicious Embedded Chips? And TSMC Rides the Leading Edge

IFTLE 397: Malicious Embedded Chips? And TSMC Rides the Leading Edge


October 30, 2018    Phil Garrou

Malicious Embedded Chips in our Mother Boards? Early October brought a report from Bloomberg that I have heard was the top tech story circulating at the

Bridging the Interconnect Pitch Gap Calls for 3D Technologies

Bridging the Interconnect Pitch Gap Calls for 3D Technologies


October 29, 2018    Francoise von Trapp

Last week at IWLPC, keynote speaker, Doug Yu, TSMC, kicked off the event with a similar storyline used by ASE’s Tien Wu during his IMAPS

IFTLE 396: DARPA Envisions CHIPS as New Approach to Chip Design and Manufacturing

IFTLE 396: DARPA Envisions CHIPS as New Approach to Chip Design and Manufacturing


October 17, 2018    Phil Garrou

First a word on the change in venue… After working with Pete Singer at Solid State Technology from 2010-2018 and previously at Semiconductor International from

Hello, Microelectronics and Packaging? Your Opportunities are Calling

Hello, Microelectronics and Packaging? Your Opportunities are Calling


October 16, 2018    Francoise von Trapp

There’s no doubt about it. This is a good time to be in the microelectronics and packaging sector of the semiconductor industry. With exciting markets

TSMC Announces SoC Design in the Cloud at the OIP 2018 Ecosystem Forum

TSMC Announces SoC Design in the Cloud at the OIP 2018 Ecosystem Forum


October 11, 2018    Herb Reiter

As I prepared to attend TSMC’s OIP 2018 Forum on October 3, 2018 two emails from TSMC caught my attention. They conveyed the news that