The 3DIC Working Group takes a deeper dive into technical issues impacting this technology. Please join us on April 17, 2013, beginning at 2 p.m. (PST) at eSilicon, as we explore ESD and Thermal issues being resolved by the development community.
3D IC integration and ESD: Not the ESD you grew up with!
Stephen Fairbanks, Certus Semiconductor
3D IC package design is presenting a whole new series of challenges for ESD design. The real challenge however is not designing the ESD protection itself, it lies in understanding and defining what is a real ESD concern and what is not a real ESD concern. When you are dealing with IC systems being built into the package, traditional ESD standards, testing and risks as we are familiar with them today, either no longer apply, or they become worse and exacerbated. This presentation will be a high level discussion focused on introducing the audience with a new mentality and attitude towards ESD for 3D IC integrated packages, and how those attitudes may shape the future of ESD for the IC’s involved.
The remainder of the program will be status updates by Working Group leaders followed by discussion.