Don’t Toss That Gasoline Engine Just Yet – SemiEngineering
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Even older vehicles can run on batteries, but there are limitations. The post Don’t Toss That Gasoline Engine Just Yet appeared first on Semiconductor Engineering.
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Even older vehicles can run on batteries, but there are limitations. The post Don’t Toss That Gasoline Engine Just Yet appeared first on Semiconductor Engineering.
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Globally, sustainability has become a much larger conversation than just taking steps to achieve zero carbon emissions. The UN has established 17 sustainable development goals that cover everything from climate change to diversity, equity, and inclusion. As the world becomes more socially conscious, it is no longer enough for a company to be profitable – […]
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Like cities, chips need to go vertical to expand. The post 3D IC: Opportunities, Challenges, And Solutions appeared first on Semiconductor Engineering.
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Chiplet integration can enable disaggregated server, heterogenous computing and domain-specific acceleration within data centers. The post Chiplet Strategy is Key to Addressing Compute Density Challenges appeared first on EETimes.
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How to determine appropriate electrostatic discharge robustness requirements. The post Can We Efficiently Automate 2.5/3D IC ESD Protection Verification? appeared first on Semiconductor Engineering.
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Advanced packaging is now of strategic importance for IDMs, foundries, and OSATs, leading to more than US$10 billion in investment. “The advanced packaging market was worth US$30 billion in 2020 and is expected to grow at a CAGR of 8% to reach US$47.5 billion in 2026 during this period”, asserts Santosh Kumar Principal Analyst & […]
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Chiplets are the new “It” heterogeneous integration technology. Many believe they provide the solution to power, performance, area and cost (PPAC) for everything from mobile computing and automotive applications, to 5G, high-performance computing, and artificial intelligence. In this podcast episode, Françoise speaks with 3D InCites’ Community Members, Kevin Rinebold of Siemens EDA, and Robin Davis […]
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Experts at the Table: The impact of optics, copper hybrid bonding, more standardized interconnects, and many other technologies under development. The post Challenges With Chiplets And Packaging appeared first on Semiconductor Engineering.
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I’ve attended the DAC conference and trade show since the late 1980s, and every visit has been a continuing learning experience about the EDA, IP and semiconductor industry. I first started attended as an EDA vendor in 1987, and since 2004 as a freelance marketing professional. There’s a significant amount of preparation… Read More The […]
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In a global industry that relies heavily on collaboration, COVID 19 created a big pause and pivot in one of the key business development tools of the microelectronics industry: technology conferences and trade shows. In this podcast, we’re talking to several industry event organizers to get their take on the past year of what worked, […]
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Many electronic devices today are dependent on semiconductor logic circuits based on switches hard-wired to perform predefined logic functions. Physicists from the National University of Singapore (NUS), together with an international team of researchers, have developed a novel molecular memristor, or an electronic memory device, that has exceptional memory reconfigurability. NUS Researchers Develop Brain-Inspired Memory […]
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How the new test data standard can make the test floor more accessible in real-time. The post Making Test Transparent With Better Data appeared first on Semiconductor Engineering.
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The only thing slowing graphics chip shipments is a supply chain hangover. The post GPU Demand Defies Pre-Pandemic Seasonality appeared first on EETimes.
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SUSS MicroTec SE and SET announce a partnership in sequential die-to-wafer (D2W) hybrid bonding, a die-based interconnect technology. As part of the partnership, SUSS MicroTec and SET will provide a fully automated, customizable, highest-yield equipment solution to customers. This solution will accelerate the industry’s path towards advanced 3D multi-die solutions such as stacked memory and […]
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3D and heterogeneous system integration research including capillary self-assembly of tiny dies with a size of less than 0.1 mm & advanced FHE using FOWLP. The post Chiplet-Based Advanced Packaging Technology from 3D/TSV to FOWLP/FHE appeared first on Semiconductor Engineering.
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A new report predicts that the global semiconductor packaging market will reach $60.44 billion by 2030 from $27.10 billion in 2020, growing at a CAGR of 9.10% from 2021 to 2030. Semiconductor Packaging Market to Reach $60.44B by 2030 was posted by Pete Singer on Semiconductor Digest.
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Over the last 18 months, the European semiconductor industry has felt the repercussions of supply chain interruptions due COVID 19 and trade wars, combined with exploding global demand for chips driven by the digital transformation. There are also questions about regional sovereignty and the need to strengthen the local supply chain. To address these topics […]
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At SEMICON Southeast Asia 2021, Mr. Terence Gan, SVP, Semiconductors, Economic Development Board (EDB) of Singapore, outlined five research pillars. Singapore’s Five Research Pillars Outlined at SEMICON Southeast Asia was posted by Pete Singer on Semiconductor Digest.
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Over the last 50 years, global temperatures have risen due to increased greenhouse gas emissions. A shared commitment and technological innovation can help reverse the impact of climate change. The post Renewable Energy, Tech Innovation Needed to Slow Climate Change appeared first on EETimes.
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The benefits of WLFO versus flip-chip land grid array (FCLGA) packaging for a radio frequency (RF) MEMS digital tunable capacitor array. The post Wafer-Level Fan-Out For High-Performance, Low-Cost Packaging Of Monolithic RF MEMS/CMOS appeared first on Semiconductor Engineering.