Heterogeneous Integration spurs demand for 3D backend solutions Julian Ho reported in the Jan 10th issue of Digitimes that heterogeneous integration of diverse semiconductor components to support 5G, AI, automotive electronics, and IoT applications is gaining significant momentum, driving demand for system-in-package (SiP) and system-on-3D package (So3D) processes and boosting the importance of c... »
Continuing our look at presentations from the recent 2018 IWLPC conference, let’s look at the Jiw Pai Henkel presentation on advanced packaging underfills. Henkel – Underfill Options for Advanced Packaging Bai and co-workers examined the use of capillary underfill (CUF), non-conductive paste (NCP) and non-conductive film (NCF) in advanced packaging applications (Figures 1 and 2). Each of... »
As its name implies, the International Wafer Level Packaging Conference (IWLPC) initially covered wafer-level packaging (WLP) technologies. As all conferences do, it soon expanded its scope to cover basically all advanced packaging topics including WLP, fan-out wafer-level packaging (FOWLP), 2.5D/3D, and advanced manufacturing and test, etc. Statistics from this year’s show include: 809 Atte... »
At the Intel “architecture day” held Dec 12th in Santa Clara, Intel finally announced what some of us have been waiting for, literally for over a decade. The Foveros Backstory In late 2006, CEO Paul Otellini displayed a 300mm wafer of 80 core microprocessors (Figure 1) and announced that such technology would soon be in production. In 2007 Bryan Black (later of AMD), Morrow and other Intel res... »
Who was Madeline on Halloween? Before we start more tech coverage of IMAPS 2018 with a look at polymer dielectric advancements, long time readers know that you are due a Halloween update on my granddaughters. This year I’m focusing on Madeline who will be eleven in February. Her Halloween disguise this year was from her favorite Netflix TV show. Can you guess the character and the show?? I hav... »
Samsung at the Leading Edge At the recent Samsung Tech Day, the company unveiled several new technologies: Their 7nm extreme ultraviolet (EUV) process node from Samsung’s foundry business SmartSSD – a field programmable gate array (FPGA) SSD, that will offer accelerated data processing and the ability to bypass server CPU limits QLC-SSD for enterprise and data centers that offer 33%t more... »
Malicious Embedded Chips in our Mother Boards? Early October brought a report from Bloomberg that I have heard was the top tech story circulating at the DoD and DARPA. For years, articles about counterfeit chips, and our reliance on Asian-made chips – where they could be modified in ways to pass on information or allow hacks – have worried us. Now…. we’ve got something new to worr... »
First a word on the change in venue… After working with Pete Singer at Solid State Technology from 2010-2018 and previously at Semiconductor International from 2007 – 2010 (as PFTLE), I have decided to move my packaging blog, IFTLE, to a new platform. I will be forever indebted to Pete for giving this old school technologist a chance to report on, and share his thoughts on, the world of IC pac... »
Yes. You read that right. It is my great pleasure to announce that Dr. Phil Garrou is joining 3D InCites as contributing editor and as a member of our esteemed technical advisory board. Like me, you may have noticed a pause in Phil’s missives on all things advanced packaging. While it’s only been a month or so since he penned his last post for Solid State Technology, it has already left a void... »
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