CEA is nominated for its continuous research effort on 3D integration, covering a wide scope from advanced packaging to fine pitch hybrid bonding and 3D sequential integration, with 3D technology development by CEA-Leti teams, and 3D circuit design by CEA-List teams. On advanced packaging, CEA had performed the design, manufacturing, and successful demonstration of an active interposer, posing an inspiring direction of chiplet-based heterogeneous integration (ECTC’2019, ISSCC’2020). On hybrid bonding technology, CEA is continuing his research in two directions. For interposer-like integration, a Hybrid Bonding Die2Wafer 5µm pitch was achieved, paving the way towards an aggressive chiplet assembly on interposers (ECTC’2021). For 3D-like integration, the bonding of 3-wafers and 2µm pitch High-Density TSV were shown at MAM’2020 and MRS’2020. These technologies are opening the path towards hybrid bonding multi-layer Smart Imagers. On 3D Sequential integration, significant progress was achieved with high dynamic range Smart Pixel, while an advanced design flow was developed for memory-on-logic, enabling design technology co-optimization (IEDM’2021).