In 2020 during IEDM 2020, TSRI unveiled its latest wafer-scale 3D stacking of MoS2/Si co-integrated CMOS devices with embedded memory functions in which 3D integration of MoS2 and Si CMOS is demonstrated via the wafer-scale 2D material deposition system platform and device technologies at TSRI. This study features dual functionalities of CMOS and non-volatile memories on a single device footprint, resulting in a significant increase in the density of logic and memory devices. This work is not only capable of extending Moore’s law, but also paves the way for 3D-ICs, in-memory computing, and synaptic electronics for AI applications.