3D+  is inspired by heterogeneous integration. Our guest bloggers focus their expertise in 3D, MEMS, and compound semiconductors to investigate how all these technologies are heterogeneously integrated into next-generation applications.

Hipster VW Flying FullSizeRender 25 Cactus

MEMS Ascendant at IMAPS Device Packaging 2017

Semiconductor device fabrication and packaging is rife with acronyms, and by my estimate, the Top 3 trafficked by speakers at the recent IMAPS Device Packaging Conference were the acronyms FOWLP, FOPLP, and MEMS. That would be fan-out wafer level packaging, fan-out panel level packaging, and microelectromechanical systems, respectively. It wasn’t that IMAPS was a MEMS packaging conference in the... »

Eva Pagneux evahexo IMG_4164

Executive Viewpoint: Next-Gen Drone Technologies Rely on Semiconductor Innovation

Robotics and drone technologies are one of the fastest growing end-use markets for integrated sensor technology today. According to a 2016 Yole Développement market report, the 2015 $351M US sensor market for drones and robots is expected to double by 2021, reaching US$ 709 million at a 12.4% CAGR. Key technologies include 3D cameras, solid state light detection and ranging (LIDAR), and ultra-pre... »

Corning FPD Sizes AMF Standards Honda-Vezel-S-front-three-quarter

Panel Level Packaging: One Size Fits All?

There is an active and robust supply chain currently supporting these wafer sizes in the semiconductor manufacturing industry: 3”; 4”; 6”; 200mm; 300mm; and 330mm. This wide range of substrates is successfully being used today for “sweet-spot’ manufacturing of LED, compound semiconductor, MEMS, trailing-edge CMOS, leading-edge CMOS, and fan-out wafer level packaging (FOWLP) applications,... »

wafer_dies_yield_model_10-20-40mm_-_version_2_-_en dark-silicon-zvi-dsi-0077-01 as-simple-as-possible chanticleer cathedral cathedral-2

Outlook 2017: SoC Goes on a Dielet

It’s 2017, and system-on-a-chip (SoC) is headed for a dielet. At least that’s my 2017 outlook, based on takeaways from some of the recent conferences I’ve attended, including, to close out 2016, 3D ASIP last month in Burlingame, CA. SoC has been packing on weight in recent years, and it’s beginning to show, to SoC’s detriment. For example, the old ISO defect density rules from my early I... »

meptec-roadmap rains-casa cal zen guide_michelin_1929_couverture_2

MEPTEC Roadmap 2016: Best Time in History to be in the Packaging Business

With nary a farewell glance in the rearview mirror at the terrain successfully covered over the decades during which we followed the ITRS’ Guide Michelin; the new Heterogeneous Integration Roadmap gives us eyes on what comes next. It looks from here-and-now all the way to a horizon that extends, like a straight highway crossing America’s vast Great Plains, a long way out. Fifteen years out. A ... »

chirp-copy i-blades-copy

MEMS & Sensors Executive Congress 2016 Sets Out to Conquer the Internet of Countless Things

A shift has occurred. As MEMS becomes mainstream, the focus of the annual MEMS & Sensors Executive Congress (MEC 2016) was less on MEMS development and more about the fun part: how we put these technologies to work for us. As Stefan Finkbeiner, Bosch Sensor Systems so eloquently put it, “Nobody wants to buy an accelerometer anymore, they want a step counter.” So how do we capture the value... »

iwlpc-2016-nepes-panels debbie-downer

First-Mover Advantage: Fan-Out Panel Level Packaging at IWLPC 2016

“It is better to be first than it is to be better.” (Ries and Trout, in The 22 Immutable Laws of Marketing.) Or is it “Fast Followers Not First Movers Are The Real Winners?” Fan-Out Wafer Level Packaging has built up such a head of steam this year (see “iPhone 7: Apple Charts a Strategic Course by Selecting TSMC’s inFO Platform”) that backwards reels the mind thinking about what come... »

chugoku cadillac-ranch

Gartner: New Normal is Slow Growth, Plentiful FOWLP

What is the “new normal” for semiconductors? Jim Walker, Research VP, Semiconductor Manufacturing, Gartner, closed out Q3 2016 with his informative talk at the IMAPS | MEPTEC | SEMI Northern California Chapter luncheon meeting on September 28, 2016, at SEMI HQ in San Jose, California, addressing the topic of the “New Normal” for Semiconductors. Remember diagraming P.E.S.T analyses ... »

gtc-2016 fdx-blog

GLOBALFOUNDRIES Exceeds Expectations at GTC 2016

If you need hard evidence that consolidation in the semiconductor industry can be a good thing, then look no further than the visible success GLOBALFOUNDRIES is enjoying in the year-and-change since it completed its acquisition of the IBM Microelectronics business. In the 01 July 2015 press release GF issued about the acquisition, Sanjay Jha, chief executive officer of GLOBALFOUNDRIES, was quoted ... »

fullsizerender-25 img_2025

European MEMS Summit 2016: Are MEMS Manufacturers Richer than Last Year?

After the European MEMS Summit 2016 concluded on Friday afternoon (September 15-16, 2016), one of the attendees asked me which presentation was  my favorite presentation. I mulled it over, first declaring it was the Intel presentation by Raji Baskaran, and then Jérémie Bouchaud’s (IHS) presentation. And then it hit me: in all honesty, my favorite presentation was the closing remarks, deli... »

Page 1 of 7123»