If you have an hour of professional development time coming to you, I advise that you spend it watching this webinar on TSV and Interposer: modeling, design and characterization, presented by Darryl Kostka, of Computer Simulation Technology (CST). But don’t just take my word for it! It comes highly recommended by Bill Martin of E-System Design, who posted this comment on LinkedIn: “a perfect, concise webinar showing how to analyze TSVs and optimize performance. I especially like the references to our Prof. Swaminathan’s work!”
In its continued efforts to educate the masses on 3D IC design, Cadence has assembled a Solutions Page on its website, where all the company’s information about its 3D tools and more can be found. Richard Goering blogs about it here.
And if you’re located in Asia or plan to travel there in the next few weeks, you might want stop in at one of three locations to attend SUSS’s Asia Technology Forum. The company is taking its show on the road, with stops planned in Singapore (Nov 15) Taiwan (Nov 20) and China (Nov 22). In addition to SUSS, represented companies include Brewer Sceince, STATS ChipPAC, ITRI, Yole Developpment, GenIsys, HD Microsystems, and Fraunhofer IZM.
