10/06/2014 - 10/09/2014 -All Day

Location: Westin San Francisco Airport

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IEEE S3S (SOI-3D-Subthreshold ) is the combination of the former IEEE International SOI Conference and the IEEE Subthreshold Microelectronics Conference. This industry-wide event will gather together widely known experts, contributed papers and invited talks on 3 main topics: (1) SOI Technology, (2) Subthreshold circuit designs, architectures, and devices, and (3) 3D Integration. Combining these three topics enables us to provide very extensive and high quality technical content, and makes the conference the perfect venue to present and learn about the most up to date trends in CMOS and post-CMOS Scaling and the low-power SOC eco-system.

This year the conference will host parallel tracks for the SOI and Subthreshold Microelectronics. In addition, 3D Integration will be featuresd. The technical sessions will be preceded by two one-day Tutorial Short Courses highlighting exciting  opportunities and their implication in CMOS scaling. Fundamental Classes will also be offered.

The regular Call for Papers is closed. Late News Submissions are still being accepted.

For details visit the IEEE S3S Website