Design

Solving the Design and Verification Challenges of High Density Advanced Packaging

Solving the Design and Verification Challenges of High Density Advanced Packaging

Today’s electronic products present new challenges to product development teams. As a result, there is a constant push to improve product quality and design efficiency through the use of new design technologies. For example, system-scaling demands change as Moore’s law becomes increasingly difficult to maintain, thus driving growth of innovative PCB and packaging technologies such as: High-den... »

Intercepting IC Products with a Disruptive Technology Option

Intercepting IC Products with a Disruptive Technology Option

Much has been written about the challenges that corporations face – especially established corporations – in adapting to a disruptive technology and the associated paradigm shifts. Most of the tomes on the subject focus on corporate management strategies. My intent is to discuss these challenges from a technology point of view – specifically when it comes to adopting so-called 2.5D and 3D d... »

3D ASIP 2014: All Aboard the 3D IC Train!

3D ASIP 2014: All Aboard the 3D IC Train!

Like the previous 10 years, RTI International held the 11th 3D-IC focused conference in early December. Instead of the usual two and a half days, this year it spanned 3 days, because it also offered a 4-hour session about 3D design challenges and solutions available from foundries, EDA and IP vendors, a power-user’s 3D views, as well as a low-power design tutorial presented by Si2’s Jerry Fren... »

Cost of 3D Test: Could it be a Showstopper for TSVs?

You all know I hate to be the bearer of bad news, but I’ve been talking to Al Crouch, Chief Technologist, Core Instruments at ASSET InterTech, and he has some grave concerns that ultimately the cost of test, if not handled properly, could kill 3D TSV integration. On the bright side, it’s not too late, if awareness is raised and the proper steps are taken with developing test methodologies. I c... »