03/09/2016 -4:00 pm - 7:00 pm

Location: Computer History Museum

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SK hynix, Inc. (“SK hynix”), Amkor Technology, Inc., eSilicon, Northwest Logic and Avery Design Systems have joined forces to offer a complete High Bandwidth Memory (HBM) supply chain solution. HBM is a JEDEC-defined standard that utilizes 2.5D technology to interconnect a SoC and a HBM memory stack. Many companies are already using HBM to create very high-bandwidth, low-power products. This seminar will present a complete HBM supply chain that is delivering and supporting customer HBM designs now.
HBM/2.5D Design
The seminar will be held on Wednesday, March 9, 2016 at the Computer History Museum in Mountain View, California. The event will begin at 4PM Pacific time and conclude with a wine and beer reception that will include interactive demonstrations from 6PM to 7PM.


  • 3D Memory Stack, Kevin Tran, Senior Manager, Technical Marketing, SK hynix
  • Interposer & Assembly, Paul Silvestri, Director of TSV Product Development, Amkor Technology
  • 2.5D Package, Silicon Die & HBM PHY, Bill Isaacson, Director, ASIC Product Marketing, eSilicon
  • HBM Controller, Brian Daellenbach, President, Northwest Logic
  • System Verification & Optimization Chris Browy, Senior VP, WW Sales and Marketing, avery design systems

Register to Attend