06/09/2021 -9:00 am - 10:00 am

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A panel co-sponsored with Accellera titled “Remote Work, Remote Chip Design: Building Chips in a Pandemic” will explore chip design and verification project upheaval caused by the pandemic. It will be held Wednesday, June 9, from 9-10am PDT. (See attached hero image.)

Tom Fitzpatrick, Strategic Verification Architect from Siemens EDA, will moderate the panel featuring:

  • Martin Barnasconi, Technical Director System Design & Verification Methodologies, NXP
  • Lu Dai, Senior Director of Engineering, Qualcomm
  • Dr. Ashish Darbari, CEO, Axiomise
  • Mark Glasser, Member of the Technical Staff, Cerebras
  • Patrick Lynch, Senior Engineering Manager, Xilinx

Date: Wednesday, June 9

Time: 9-10am PDT

Pricing: Complimentary

Registration:  https://bit.ly/3eK3YdQ