3D ASIP 2013

3D ASIP 2013

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Date/Time
Date(s) - 12/11/2013 - 12/13/2013
7:30 am - 5:00 pm

Location
Hyatt Regency San Francisco Airport Hotel

Category(ies)


Celebrating its 10th Anniversary, the 3D Architectures for Semiconductor Integration and Packaging ( 3D ASIP) 2013 is shaping up to once again be the go-to event for the latest in 2.5D and 3D IC technologies. Conference co-chairs Philip Garrou, IEEE Fellow and Consultant, and Robert Patti, CTO and VP Design Engineering, Tezzaron, have noted that since the first 3D ASIP conference took place a decade ago, the 2.5/3D community and technology have progressed considerably.

As always, the event is kicked off with the Pre-Conference Symposium, Wednesday, December 11, from 11-5pm, which this year is devoted to Silicon Photonics. According to Paul Franzon, North Carolina State University, “Chip to chip photonics is coming fast and is very real.” 3D IC technologies are expected to contribute to Si photonics, thus it is fitting for as a focus for the pre-conference symposium.

The 3D ASIP Conference begins Thursday, December 12, with an opening keynote by Douglas Yu, senior director of the integrated interconnect and packaging division at TSMC, who will present Déjà Vu-Wafer Level System Integration Technology. Friday’s keynote opener from Kaivan Karimi, executive director of global strategy and business development for the microcontroller group at Freescale Semiconductor, will talk about the Role of Advanced 3-D Packaging Architectures in Support of the Internet of Things (IoT) Edge/sensing Node Devices.

Eleven sessions over two days cover everything touching 2.5D and 3D IC commercialization from market trends, technology progress, heterogeneous integration, memory/logic integration, interposers, thermal challenges, thin wafer handling, 3D applications, design and test, and more. 3D ASIP speakers represent 33 companies, universities and research organizations from around the globe.

For details, registration, and hotel information, visit the 3D ASIP Website.