12/11/2021 - 12/15/2021 -12:00 am

Map Unavailable

Highlights Educational Opportunities in Leading-Edge Semiconductor Technologies

  • The IEDM conference will provide attendees with a selection of tutorials and short courses taught by world experts in some of the most important areas of electronics
  • The late-news paper submission deadline is August 30, 2021
  • The conference is currently planned as an in-person event with on-demand access to the technical program afterward
  • A supplier exhibition will be held in conjunction with the technical program

The 67th annual IEDM is scheduled for December 11–15, 2021 at the Hilton San Francisco Union Square hotel under the theme “Devices for a New Era of Electronics: From 2D Materials to 3D Architectures.

At IEDM each year, the world’s best scientists and engineers in nano/microelectronics gather to participate in a technical program consisting of more than 220 presentations, along with a variety of panels, focus sessions, Tutorials, Short Courses, a supplier exhibit, IEEE/EDS award presentations and other events highlighting leading work in more areas of the field than any other conference.

IEDM Tutorials – Saturday, Dec. 11

Now in their 12th year, the 90-minute Saturday tutorial sessions on emerging technologies and specialized topics have become a hugely popular part of IEDM. They are presented by experts in the respective areas, the goal being to bridge the gap between textbook-level knowledge and leading-edge current research. The topics for 2021 are:

2:45 p.m. – 4:15 p.m.

4:30 p.m. – 6:00 p.m.


IEDM Short Courses – Sunday, Dec. 12

In contrast to the Tutorials, the full-day IEDM Sunday Short Courses are focused on a single technical topic. Early registration is recommended, as they are often sold out. They offer the opportunity to learn about important areas and developments, and to network with global experts.

  • Future Scaling and Integration Technology, organized by Dechao Guo, IBM Research
  • Processes and Materials Engineering Innovations for Advanced Logic Transistor Scaling, Benjamin Colombeau, Applied Materials
  • Interconnect Resistivity: New Materials, Daniel Gall, Rensselaer Polytechnic Institute
  • Metrology and Material Characterization for the Era of 3D Logic and Memory, Roy Koret, Nova Ltd.
  • Beyond FinFET Devices: GAA, CFET, 2D Material FET, Chung-Hsun Lin, Intel
  • Heterogenous Integration Using Chiplets & Advanced Packaging, Madhavan Swaminathan, Georgia Tech
  • Design-Technology Co-Optimization/System-Technology Co-Optimization, Victor Moroz, Synopsys


  • Emerging Technologies for Low-Power Edge Computing, organized by Huaqiang Wu, Tsinghua University and John Paul Strachan, Forschungszentrum Jülich
  • Mobile NPUs for Intelligent Human/Computer Interaction, Hoi-Jun Yoo, KAIST
  • Brain-Inspired Strategies for Optimizing the Design of Neuromorphic Sensory-Processing Systems, Giacomo Indiveri, University of Zurich
  • Memory-Based AI & Data Analytics Solutions, Euicheol Lim, SK hynix
  • Material Strategies for Memristor-Based AI Hardware and their Heterointegration, Jeehwan Kim, MIT
  • RRAM Devices for Data Storage and In-Memory Computing, Wei Lu, University of Michigan
  • Practical Implementation of Wireless Power Transfer, Hubregt Visser, IMEC


Vendor Exhibition/Poster Sessions

Further information about IEDM

For registration and other information, visit www.ieee-iedm.org.