Cadence made an unprecedented leap in the industry, advancing 3D-IC design with its Integrity 3D-IC platform. The new platform is the industry’s first comprehensive, high-capacity 3D-IC platform that provides system planning, chip and package 3D implementation and integrated electrothermal, static timing analysis (STA) and physical verification flows in a single cockpit, enabling faster, high-quality 3D design closure.

Legacy market solutions were disjointed, utilizing a die-by-die implementation approach. To differentiate, Cadence enhanced its system-on-chip (SoC) implementation with 3D partitioning and tightly integrated system analysis tools around a multi-technology database to give customers an additional benefit of system-driven power, performance and area (PPA) optimization.

This next-generation platform is for designers creating tomorrow’s multi-chiplet designs for hyperscale computing, 5G communications, mobile and automotive applications.