Bryan Black and AMD's engineering team

AMD's use of a silicon interposers with 65,000 TSVs and a logic die in the center of four HBM stacks with four DRAM each represents a major engineering achievement. Fiji has 4X bandwidth improvement per watt over AMD’s Radeon™ R9 290X. It has a 4,096-bit memory interface with four stacks creating 512GB/s of bandwidth, which is 60 percent more bandwidth than the Radeon™ R9 290X.

The new architecture required 8.5 years of R&D, engineering, and product ramp. The massive engineering effort included technical core competence development of micro-bumping, middle-end-of-line (MEOL) TSV fabrication, assembly, and test solutions. A total of 20 different company and government organizations were involved in working on the project. Demonstrations in conjunction with the Fraunhofer Institute in Germany assisted in the development of the tool infrastructure. The complexity of die stacking involved many factors that could only be analyzed and addressed by building functional prototypes.