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Adaptive manufacturing uses AI and automation to secure resilient global supply chains. The post Adaptive Manufacturing: Reconfiguring for Resilience and Local-Global Balance appeared first on EE Times.
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A crowded server board with ten thousand parts doesn’t forgive sloppy inspection—and neither do pricey GPUs and chiplets. From the floor of Productronica in Munich, we dig into how automated optical inspection keeps advanced packages honest once they hit the PCB line, where solder quality, coplanarity, and sheer component variety can make or break yield. […]
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Want a candid look at how women build durable careers in one of the world’s toughest industries? We sit down with three semiconductor leaders – Nitza Basoco, Anne Meixner and Julia Freer – who share how early encouragement, gritty problem solving, and clear communication turned curiosity into impact. From summer jobs at national labs and […]
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Send us a text Power electronics are quietly rewriting the rules of energy use—from the range of your EV to the efficiency of a hyperscale data center. Françoise sits down with Henkel’s Ram Trichur to unpack what’s driving the $67.5B surge in power semiconductors and why the move to wide bandgap materials like silicon carbide […]
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3D chip stacking and advanced packaging are boosting edge AI performance. The post How Advanced Packaging is Unleashing Possibilities for Edge AI appeared first on EE Times.
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Send us a text The floor in Phoenix was packed, and so were the ideas. We sat down with innovators across the stack—equipment makers, metrology experts, logistics strategists, and software leaders—to map the real state of advanced packaging and what it takes to build, measure, move, and power tomorrow’s chips. EV Group kicked things off […]
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Pomerania in Northern Poland is emerging as Europe’s next semiconductor and mobility hub, driven by talent, clean energy, and strategic collaboration. The post Northern Poland: Building Europe’s Next Semiconductor and Mobility Hub appeared first on EE Times.
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China has reportedly issued a sweeping ban on foreign AI chips in any data center backed by government money, applying retroactively to early-stage builds.
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Send us a text A nationwide talent engine for chips is taking shape—and it’s built to scale. Recorded live at SEMICON West in Phoenix, we sit down with SEMI Foundation leaders to unpack the National Network for Microelectronics Education, a hub-and-node model designed to align schools, employers, and workforce systems. Backed by CHIPS Act funding […]
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Send us a text We recorded live at IMAPS with Siemens, ACM Research, Shellback Semiconductor, DECA, Nordson Electronic Solutions, and VIEW Micro Metrology to explore how AI demand, chiplets, and panels are reshaping advanced packaging. We dig into 3D BLOX, thermal and test roadblocks, green chemistries, metrology at scale, and why the back end now […]
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GenAI value is creating a huge TAM and revenues are ramping at historically fast rates. The post AI Bubble Or Boom? appeared first on Semiconductor Engineering.
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After a week of events in Silicon Valley, from OCP Summit to Synaptics Tech Day and Infineon Technologies’ OktoberTech, our editors reflect on the rapid innovation happening. The post Silicon Valley Events Highlight Rapid Innovation from Power to Edge AI appeared first on EE Times.
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Send us a text We record live at IMAPS to follow a first-time attendee’s leap into advanced packaging and a trio of high school students discovering semiconductors, robotics, and career paths that bridge disciplines. Along the way, we unpack speed-to-market, standards, hybrid vs TCB, and why AI skills matter. • why a self-funded first conference […]
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Intel’s decision to walk away from facility buildouts in Germany and Poland reshapes Europe’s semiconductor ambitions, forcing policymakers to rethink priorities. The post Intel’s Retreat Shifts Europe Semiconductor Reality appeared first on EE Times.
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Excitement in Phoenix as trade show draws record attendance, especially as manufacturing ecosystem rapidly evolves in the region. The post Arizona Benefits from TSMC, Intel as SEMICON West Debuts in Phoenix appeared first on EE Times.
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Send us a text We sit down with Dr. Subu Iyer of UCLA to unpack chiplets vs dielets, why a universal ecosystem is missing, and how sub‑10 µm bump pitch could make protocols optional. Then we host a panel featuring John Knickerbocker, IBM; Mike Kelly, Amkor; and Tolga Tekin, Fraunhofer IZM on co‑packaged optics, bandwidth, […]
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Send us a text A semiconductor wafer travels around the globe five times on average before becoming the chip in your smartphone. Each journey represents a potential risk to device reliability that few consumers—or even industry professionals—ever consider. Behind every high-performing semiconductor device lies a carefully orchestrated logistics operation ensuring these sensitive components arrive intact […]
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Tool chains need improvement as chipmakers begin stacking AI chips, increasing the thermal density and unpredictability over time. The post How To Cool 3D-ICs appeared first on Semiconductor Engineering.
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TSMC’s decision to implement unprecedented price hikes will end the era of cheap transistors. The post TSMC Price Hikes End the Era of Cheap Transistors appeared first on EE Times.
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Multi-physics simulation and new reflow options help keep a lid on warpage. The post Mitigating Warpage In Multi-Chiplet Systems appeared first on Semiconductor Engineering.
