Much of the $2-4B spent on developing a new semiconductor technology is in the form of iterative trial-and-error cycles of learning, conducted with many wafer-based experiments in the fab and the lab. The cycle time and cost of technology development have become cost-prohibitive, and an alternative solution is required, particularly with the current process complexity of 3D device structures and heterogenous integration schemes.

SEMulator3D® is a 3D semiconductor process modeling platform that can perform fast and accurate 'virtual fabrication' of semiconductor and MEMS devices. SEMulator3D can predictively model any fabrication process applied to any semiconductor design. Starting from a "virtual" silicon wafer, the product performs a series of unit processes like those in the fab to create highly accurate 3D computer models of the predicted structures on wafer. These virtual structures can be generated and analyzed in a fraction of the time and cost of an in-fab experiment and can be used to examine proposed process changes and expected or actual process failures. The product allows engineers to parallel the capabilities of actual fabs, and understand manufacturing issues early in the development process, to reduce time-consuming and costly silicon learning cycles. SEMulator3D is being used by most of the world’s major logic and memory device manufacturers to accelerate their time to market.