IWLPC 2018

Wally Rhines Discusses the Importance of EDA and Design at IWLPC 2018

Wally Rhines Discusses the Importance of EDA and Design at IWLPC 2018

At this year’s International Wafer-level Packaging Conference, almost 1000 semiconductor experts from all parts of the supply chain gathered at the DoubleTree Hotel in San Jose from October 23 to 25. Among them were also several electronic design automation (EDA) experts who discussed how to streamline die-package-board co-design. They explained how EDA tools enable higher performance per Watt a... »

Talking Nerdy with Exhibitors at IWLPC 2018

Talking Nerdy with Exhibitors at IWLPC 2018

With heterogeneous integration, 3D, and advanced wafer-level packaging technologies officially declared the rising stars of the semiconductor industry, materials, process and equipment suppliers have pulled out their shiniest bells and whistles. Here’s a sampling of news and products that were on display at IWLCP 2018, October 23-25, 2018 at the Doubletree Hotel in San Jose. Indium Corporation... »

Bridging the Interconnect Pitch Gap Calls for 3D Technologies

Bridging the Interconnect Pitch Gap Calls for 3D Technologies

Last week at IWLPC, keynote speaker, Doug Yu, TSMC, kicked off the event with a similar storyline used by ASE’s Tien Wu during his IMAPS Symposium keynote earlier this month: High-performance applications like artificial intelligence (AI), 5G, autonomous driving, and even high-end smartphones are driving the continuation of Moore’s Law augmented by More than Moore. This need for high-performan... »