HIR roadmap

SEMI ASMC 2019: Heterogeneous Integration Enters the Mix

SEMI ASMC 2019: Heterogeneous Integration Enters the Mix

“It’s relatively easy to build a fancy new transistor in the lab, but in order to replace what we’re doing today, you need to be able to put billions on a chip, at a reasonable cost, with high reliability and almost no defects. It is very difficult. That makes it all the more important to pursue other ways of making better computers.” Linley Gwennap, in The Economist, March 2016. “It may... »

The Heterogeneous Integration Roadmap Explained by Bill Chen

The Heterogeneous Integration Roadmap Explained by Bill Chen

Festivities at ECTC 2018 kicked off May 29, 2018, with a full-day Heterogeneous Integration Roadmap (HIR) Workshop. This workshop was a continuation of an ongoing series that have been scheduled alongside major conferences around the globe so that as many people as possible can participate. We’ve been following the progress since the beginning. I caught up with Bill Chen, president of the IE... »

ECTC 2018 Paves the Path to Heterogeneous Integration

ECTC 2018 Paves the Path to Heterogeneous Integration

For nine years, my fellow 3D InCites bloggers and I have been evangelizing about the wonders the microelectronics industry can achieve with innovations in 3D, advanced packaging, and other heterogeneous integration (HI) technologies. Based on the turnout at this year’s IEEE Electronics Components and Technologies Conference, which took place May 29-June 1 in San Diego, CA, it would appear that t... »

Taking Stock and Redefining the Heterogeneous Integration Roadmap at IMAPS DPC 2018

Taking Stock and Redefining the Heterogeneous Integration Roadmap at IMAPS DPC 2018

As it has for the past 14 years, the global microelectronics industry gathered at Wekopa Resort and Conference Center in Fountain Hills, AZ, March 6-8, 2018, for the 2018 IMAPS Device Packaging Conference (DPC) to share knowledge, discuss strategies for growth, learn about the latest heterogeneous integration from fan-out wafer level packaging (FOWLP) to 3D ICs. We also managed to get in some golf... »

IEDM 2017 Looks Way Beyond Moore’s Law

IEDM 2017 Looks Way Beyond Moore’s Law

The International Electronic Device Manufacturing Conference (IEDM) has always focused on device scaling, successfully guiding our industry for several decades along the challenging paths of Moore’s Law and the ITRS Roadmap. Both were primarily focused on digital functions. However, we all must agree that the real world around us is analog. To allow our electronic devices to better assist us in... »