heterogeeous integration

A Fan-Out Wafer Level Packaging Epiphany

A Fan-Out Wafer Level Packaging Epiphany

I’ve had an epiphany regarding fan-out wafer level packaging (FOWLP). Epiphany: “A usually sudden manifestation or perception of the essential nature or meaning of something.” In FvT’s piece “Spotlight on FOWLP, Monolithic 3D IC, and 3D TSVs,” (13 May 2015) I am quoted saying: “Show me where monolithic or FOWLP is … can’t seem to find it.” I wasn’t alone in my thinking; we re... »

CEA-Leti: A visit to the mother ship

If your company is located in France, and/or is involved in micro and nanotechnologies for microelectronics, chances are it’s either a spin out of Leti, its parent organization CEA, or is closely tied in ongoing collaboration to this major European research center for applied electronics. At least that is the impression I came away with after visiting Leti at its Minatec campus in Grenoble, ... »