• Preferred business picOur industry is seeing greater diversification in manufacturing processes than it has since its earliest days. In the front-end numerous new materials, architectures, and processes are under development to enable the continuing march toward smaller device sizes. In the back-end, and many places in between, advanced packaging processes and 3D integration are adapting processes from the front-end, vastly increasing the overall complexity of the manufacturing process. The list includes wafer level chip scale packaging (WLCSP), copper pillar bumps on through silicon vias (TSVs), fan-out wafer level processing (FOWLP), and many more. Much of our focus at Rudolph in the coming year will be in the areas of 3D integration and advanced packaging where new challenges are creating new opportunities.

    Although many processes entering the back-end are adaptations of well understood front-end processes, the particular needs of back-end features require significant modifications, and in some cases, a complete rethinking, of these technologies to optimize them for back-end applications. For instance, in lithography, the ability to resolve the smallest possible feature is no longer the overriding priority it is in the front-end, and it is far from clear that a tool designed to expose round silicon wafers is the best overall solution. Our JetStep® system is specifically designed to expose larger features while taking advantage of the efficiency and cost benefits offered by larger rectangular substrates.

    As the complexity of back-end processes increases, so too does the need for inspection and metrology. Our new SONUS™ acoustic measurement technology meets a critical need for measuring and inspecting the larger structures used to connect chips to each other and to the outside world. These structures, including TSVs and copper pillar bumps, are typically tens of micrometers in size and simply too large for front-end metrology techniques designed for nanometer and Ångstrom scale measurements. In addition to measuring thicker films and film stacks, SONUS technology can detect voids, cracks, delamination and other defects, it is non-destructive, and it is faster and less expensive than alternative techniques.

    Fault detection and classification (FDC) will be another area of focus for us in the coming year. Because advanced packaging processes use known good die (KGD), equipment failures that result in the loss of product can be very costly. Many of the tools used in advanced packaging regularly generate notifications and alerts regarding their current operating status and condition. In the worst case, this valuable data is simply ignored. More often, it is collected somewhere and analyzed retrospectively to determine the cause of an equipment malfunction. Automatic fault detection and classification monitors this critical data to provide real time assessment of operating conditions, including tool-to-tool comparisons, trend analysis, predictive warnings of impending failure, immediate notification of fault conditions and predefined responses to pause or halt the process. FDC can dramatically reduce damage to work in progress, reduce repair and maintenance cycle times, improve throughput, increase uptime, and reduce labor costs for operators and engineers.

    Optically-based macro defect inspection and metrology systems, such as our NSX® Metrology systems, are already well suited for the size regime of advanced packaging processes, however, they must be optimized for the particular needs of these processes. For instance, the ability to inspect all surfaces of the wafer enables quicker detection of issues, such as warped wafers during bond or defects generated during de-bond.

    In the area of process control, the integration of inspection, metrology, and yield management and analysis data in an automated process control solution, such as our Discover® yield analysis software, can help manufacturers quickly diagnose process problems and identify opportunities for yield enhancement. All of the inspection and metrology data for all surfaces of a wafer can be analyzed seamlessly at any of the different process monitoring steps. Techniques, such as run-to-run control, accelerate yield ramp and sustain higher on-going yields with defectivity rates approaching the automotive gold standard of zero. Discover software can connect tools made by any manufacturer, providing un-paralleled access to process data.

    Rudolph has deep roots in the back-end. We welcome the opportunity to work with our customers to develop innovative solutions that realize the benefits proffered by this new wave of development in advanced packaging and 3D integration, improving yields, accelerating time-to-market and increasing profitability. ~ R. Roy

  • Funny! and True! and we know the story of the six blind men and the elephant… I assume we do… They are all correct, but yet incomplete, ecause they view this “elephant” from their perspective. Great article Francoise.

  • ThumbnailI thought I would go to Singapore, attend EPTC (Electronic Packaging Technology Conference 2013) and then take off on my personal vacation to India to attend my 40th high school reunion and 35th college reunion – […]

  • Think POP also as a way of stacking that is cheaper. Apple A6 is a POP. The DRAM and Flash are stacked dies and yes on an interposer.

  • ThumbnailApproximately 880 people registered for IMAPS International 2013, and yes the fiasco in Washington even affected IMAPS – there were last minute cancellations from people who work directly or indirectly for the […]

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