Die stacking enables better chip performance in a small form factor, meeting the needs of smartphones, tablets, and other advanced devices. Through-silicon vias are moving into volume packaging production, but problems with reliability, cost, and scaling remain. The supply chain also must adjust to this “mid” step between front- and back-end chip production. Hosted by Solid State Technology, this webcast will explore the wafer thinning, bonding, TSV formation and other critical process steps necessary to enable 3D integration.
Technology & Market Analyst, Advanced Packaging & Semiconductor Manufacturing
Senior Director 3D TSV Development