MEPTEC 2017 Semiconductor Packaging Symposium

MEPTEC 2017 Semiconductor Packaging Symposium

Loading Map....

Date/Time
Date(s) - 11/30/2017
All Day

Location
SEMI Global Headquarters

Category(ies) No Categories


As the growing need to integrate disparate semiconductor technologies in a cost-effective way with rapid cycle time and the driving demands of our increasingly connected world, we find many key hurdles in mainstreaming heterogeneous technology packaging solutions. The MEPTEC 2017 Semiconductor Packaging Symposium will explore three issues central to the successful execution of heterogeneously integrated packages:

• Can the packaging community establish a real design for the heterogeneously integrated ecosystem?

• Should we rethink the reliability standards for these heterogeneously integrated SIP packages?

• What are the best test strategies for this heterogeneous integration, or at least what are
• the guiding principles?

This year’s MEPTEC Semiconductor Packaging Symposium program will feature three keynote presentations from industry experts outlining these three issues in more detail, each followed by an interactive panel discussion on these same topics. The panels will be populated with industry experts with diverse and perhaps conflicting views on these important topics.

Be sure to join for what promises to be an exciting and educational day as we debate the issues central to successful heterogeneous integration implementation!

READ MORE ABOUT THE PANELS

Register here