Submission Deadline: Monday, April 5, 2021
IWLPC is now in its 18th successful year as a well-established international conference, boasting annual representation from over 19 countries. The technical program and exhibition focus on semiconductor packaging and advanced wafer-level packaging technology featuring 3 tracks in WLP, 3D Integration, and Advanced Manufacturing and Test. This year is a continuation of Advanced Packaging in the New Connected World reflecting the enablement of 5G communications, AI, and IoT, automotive and more.
Wafer-Level Chip Scale Packaging (WLCSP), Flip-chip, Fan-Out and Redistribution, Wafer and Device Cleaning, Nanotechnology, Quality, Reliability, and COO.
3-D Package Integration
3D WLP, Thru Silicon Vias (TSV), Thru Glass Vias (TGV), Silicon Interposers, Stacking Processes (W2W, D2W, D2D), IC Packaging Substrates, TSV Integration methods (FEOL vs BEOL).
Advanced Integrated Systems and Devices
System packaging leveraging wafer-level process technologies including: System-in-Package (SiP), MEMS, sensors, Package-on-Package (PoP), embedded die and passives, and EMI shielding methods.
Advanced Manufacturing and Test
Advances in wafer-level manufacturing processes, equipment and materials including: novel process or material technologies, improved equipment throughput and productivity, control methodologies (SPC, APC, FDC), factory output & cycle time improvements, advanced automation technologies, warped wafer handling, wafer level test methods, wafer level vs. singulated unit test for WLP, and TSV test methods.
Professional Development Courses
Now accepting abstracts from instructors looking to teach PDC’s on topics relevant to conference topics. Abstracts should include course objective, topics covered and intended audience for the workshop.
Click here to submit.