IWLPC 2019

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Date(s) - 10/22/2019 - 10/24/2019
12:00 am

DoubleTree by Hilton Hotel


SMTA and Chip Scale Review are pleased to announce the 16th Annual International Wafer-Level Packaging Conference and Tabletop Exhibition. IWLPC brings together some of the semiconductor industry’s most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging and manufacturing.

Register here: http://www.iwlpc.com/register_now.cfm

Technical Program Announced!

Interconnecting Wafer-Level Packaging, 3D Packaging, Advanced Manufacturing and Test, the International Wafer-Level Packaging Conference (IWLPC) is at the forefront of the packaging technology evolution.

The Wafer-Level Packaging (WLP) track features sessions on Advanced Wafer Level Packaging & Materials, Reliability and Metrology, Fan Out Wafer level Packaging (FO-WLP), and Advanced Processing.

The 3D Packaging track features sessions on Design, Characterization and Test, Wafer Bonding and Chip Stacking, and Processing for Fan-Out.

The Advanced Manufacturing track features sessions on Process Materials and Equipment.