EV Group’s GEMINI Wafer Bonding System First to Pass Equipment Maturity Assessment within SEMATECH’s Interconnect and Manufacturability Program

SEMICON West, San Francisco, Calif., July 10, 2012 — EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that its GEMINI® Automated Wafer Bonding System has become the first product to pass a systematic, rigorous Equipment Maturity Assessment (EMA) implemented within SEMATECH’s 3D Interconnect pr... »


NEWBURY PARK, CALIF.--Tamar Technology received an order for its WaferScan metrology system from a major semiconductor manufacturer. The system will be used for 3DIC packaging and process development. Tamar’s WaferScan system provides high-speed non-destructive metrology for 3DIC advanced packaging processes being developed for high volume manufacturing (HVM). The system has a modular design a... »

SPTS Debuts Low-Temperature PECVD Technology for 3D-IC

SPTS Technologies has launched its low temperature plasma-enhanced chemical vapor deposition (PECVD) solution for via-reveal passivation in 3D-IC packaging applications. Already proven in 300mm volume production fabs, the Delta fxP® PECVD system deposits dielectric layers onto bonded substrates at wafer temperatures below 200°C,  with throughputs up to twice that of its competitors. Via reveal... »

STATS ChipPAC Expands Manufacturing Presence in Singapore with a New Factory

STATS ChipPAC Ltd., semiconductor test and advanced packaging service provider, today held the groundbreaking ceremony for a new factory in Singapore. The new 197,000 square foot building will be located next to the Company’s current factory in Yishun, Singapore and will enable STATS ChipPAC to expand its manufacturing capabilities for advanced wafer level technologies including embedded Wafe... »

STATS ChipPAC Advances TSV Capabilities; Qualifies 300mm MEOL and Low Volume Manufacturing

Outsourced Semiconductor Assembly and Test (OSAT) provider, STATS ChipPAC Ltd., has announced qualification of its 300mm middle-end-of-line (MEOL) manufacturing operation for Through Silicon Via (TSV) capabilities, and will transition to low volume manufacturing.  STATS ChipPAC says it is firmly engaged with multiple strategic customers on TSV development programs that support the semiconductor »

Impress Labs Boosts Content Marketing Strategy With Strategic Hire of 3D InCites Technology Journalist Françoise von Trapp

Impress Labs, a global brand, creative, and communication agency for the semiconductor, solar energy and life science industries, today announced the addition of leading 3D IC technology journalist and 3D InCites founder, Françoise von Trapp, to its Semiconductor Lab. The new hire is part of Impress Labs’ ongoing strategy to offer clients greater market expertise, while continuing efforts to de... »

EV Group Unveils Its Next-Generation EVG150 Automated Resist Processing Platform for High-Volume Coating/Developing Applications

Redesigned, Fully Automated Modular System Integrates Unmatched Spray Coating Processes for MEMS, Compound Semiconductors and Advanced Packaging SEMICON TAIWAN, Taipei, September 4, 2012 - EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today unveiled its next-generation EVG150 automated resist processing syste... »

Dow Corning and SUSS MicroTec Collaborating on Temporary Bonding Solution for Semiconductor Packaging

Dow Corning, supplier of advanced silicon technology and materials to the semiconductor industry, and SUSS MicroTec, supplier of semiconductor processing equipment announced a collaboration on a temporary bonding solution for 3D through-silicon via (TSV) semiconductor packaging. As part of this non-exclusive agreement, the companies are developing a material and equipment system solution for high ... »

STATS ChipPAC Introduces Scalable 3D eWLB Solutions

Semiconductor test and advanced packaging service provider, STATS ChipPAC Ltd. announced its next-generation three dimensional (3D) embedded Wafer Level Ball Grid Array (eWLB) Package-on-Package (PoP) solutions. This innovative new 3D technology provides an ultra thin package profile height below 1.0mm, a 30% height reduction over the industry standard 1.4mm total stacked package height. Market d... »

SUSS MicroTec launches platform for permanent wafer bonding, debonding and cleaning

SUSS MicroTec,supplier of equipment and process solutions for the semiconductor and related markets, launched the XBC300 Gen2, a high volume manufacturing platform for advanced 3D processing. The new bonding equipment can be used for permanent wafer bonding, or debonding and cleaning of 200mm and 300mm wafers. It is designed for production as well as process development. Configurable with a wide ... »

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