Going UP! Next-Generation IC Assembly

Coverage of the GSA Memory Conference continues in this week's issue of Chip Scale Review Tech Monthly. Francoise von Trapp contributed this article. While there continue to be incremental improvements and innovations in single chip packaging technologies, it’s nothing compared to the focus on multi-chip assembly and packaging technologies. Whether they’re called systems-in-package (SiP), mul... »

TSVs Find Their Way into Prototypes

Designing and building a prototype MEMS device with TSVs in it is pretty much unheard of.  As Alissa Fitzgerald, Ph.D., founder and managing member of AM Fitzgerald &Associates explains it, TSVs don’t get introduced into a device until it’s in volume production, rather MEMS devices are developed with either a TSV or wire bond option. “Once the device is in mass production, you can thin... »

Simulation and Modeling Tools enable 3D MEMS Systems

One of the main themes of last week’s MEMS Executive Congress was to “think outside the chip” (Roger Grace, of Roger Grace Associates) and rather, think of MEMS in terms of the system.  However, to do that, there needs to be interaction between everyone involved in developing said system, including the MEMS designer, IC designer, the system architecture and the firmware that ties it all tog... »

European PRO3D Consortium Takes on the Memory Wall

In developing an application to integrate 128 processors on a single chip, ST Microelectronics turned to Leti for assistance. To take on this task, Leti called in reinforcements, organizing and launching the European PRO3D Consortium, with ultimate goal of developing a holistic approach to system design that encompasses software, architecture and 3D integration. 3D Incites spoke with Ahmed Jerray... »

Progress is Progress in the Medical Device World

This was my second year attending the Medical Electronics Symposium, and I’m not sure what I was expecting, but when it came to technology advancements themselves, I noticed that not much exciting has happened since last year. Or maybe I’ve just been spoiled.  Not every year can be about earth-shattering technological breakthroughs. This was the year about continuing progress of the breakthro... »

Lowering integration risks for 3D TSV products

A critical challenge for fabricating 3D products is the integration of the dies with through-silicon vias (TSVs) into functioning and reliable 3D stacks. As a way to assess and overcome the risks, imec has created the SmartSamples platform. SmartSamples allow validating 3D stacks before the actual product design, avoiding costly re-spins and additional expenses. They are IC emulators, prototype 3D »

Extending Legacy Technologies into the 3D Space

While TSVs technologies make their way out of R&D on to the manufacturing floor, improvements and developments in non-TSV 3D packaging approaches continue to make waves in the industry. It only stands to reason that for companies already involved in high-volume manufacturing either as a supplier, packaging foundry, or licensor of legacy technology, that improvements affecting existing 3D pack... »

STATS ChipPAC takes eWLB to 300mm; paves the way for 3D eWLB

Embedded wafer level ball grid array (eWLB) technology has been a hot topic lately on 3D InCites, what with our recent discussion with ST Micro’s Xavier Baraton, and this week’s »

Inside CEA-Leti’s 3D Toolbox

Grenoble-based research institute CEA-Leti’s progress is fueled by a single mission: create innovation and transfer it to industry. The goal is to reach marketability within 5 years. As such, Leti’s focus is less on the feasibility of a technology, and more on the probability of that technology being viable in volume production. When it comes to 3D integration, achieving this goal has resulted... »

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