CEA-Leti

Leti is paving the way to future high-efficiency systems for high-performance computing with its chiplet-on-interposer concept, as well as its wafer-level integration of thin silicon bare dies within a flexible label. Additionally, ongoing activities in 3D VLSI technology have resulted in the achievement of 1µm pitches in wafer-to-wafer and die-to-wafer stacking using hybrid bonding technology. They are also developing ultra-fine pitch 500 nm hybrid bonding technology. In their CoolCube program, they have proved with a test chip that a 500°C thermal budget for the top layers is acceptable. A multi-project wafer has been recently launched for this monolithic 3D IC solution.