admin-impress, Author at 3D InCites

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FOGALE Nanotech Acquires Altatech: Expanded Portfolio Includes Wafer Inspection and Deposition Tools

FOGALE Nanotech Acquires Altatech: Expanded Portfolio Includes Wafer Inspection and Deposition Tools

Nimes, France, April 15, 2016 – FOGALE Nanotech today announced that it has acquired Altatech, a specialized technology leader in the development of wafer inspection and material deposition tools for semiconductor manufacturing. Altatech SAS has headquarters in Grenoble, France, located in the center of the French Silicon Valley with a commercial subsidiary in Germany. This strategic acquisition... »

EV Group: GEMINI®FB XT Automated Production Fusion Bonding System

EV Group: GEMINI®FB XT Automated Production Fusion Bonding System

The GEMINI®FB XT fusion wafer bonding platform features up to a 3X improvement in wafer-to-wafer bond alignment accuracy as well as a 50% increase in throughput over the previous industry benchmark platform. These performance breakthroughs clear several key hurdles to the industry’s adoption of 3D-IC/TSV technology. Testimonial According to the ITRS, high-density TSV applications require wa... »

Omnivision: OV23850 PureCel Image Sensor

Omnivision: OV23850 PureCel Image Sensor

OmniVision’s OV23850 PureCel image sensor utilizes the companies advanced stacked die process capture exceptional images and video in 23.8-megapixel resolution while maintaining a compact form factor, which is critical for the next-generation of slim smartphones and tablets. Testimonial OmniVision’s family of PureCel backside-illuminated image sensors use the company’s stacked di... »

IWLPC Best Papers Announced

IWLPC Best Papers Announced

SMTA and Chip Scale Review magazine announced the best papers from the 2014 International Wafer-Level Packaging Conference (IWLPC.) Winners were selected from each of the three tracks covering Wafer Level Packaging, 3-D (Stacked) Packaging, and MEMS Packaging, as well as an overall Best Paper and Best of Conference winner. IWLPC brings together some of the semiconductor industry’s most respe... »

Georgia Tech Forms a Panel-based Global Glass Industry Consortium

Georgia Tech Forms a Panel-based Global Glass Industry Consortium

At the IEEE Global Interposer Technology (GIT2014) Workshop held at Georgia Tech on November 5-7, 2014, Georgia Tech announced the formation of a Panel-based Global Glass Industry Consortium for low-cost, ultra-miniaturization, high-performance and silicon-like ultra-high I/O interconnections to address both small and ultra-small system needs such as smartphones, wearables, IOTs and miniaturiz... »

European 3D TSV Summit Committee  Announces Keynote Speakers; Pre-Conference Symposium to Focus on the Market

European 3D TSV Summit Committee Announces Keynote Speakers; Pre-Conference Symposium to Focus on the Market

This year’s European 3D TSV Summit, January 19-21, 2015, Grenoble France, will focus on how interposers and 3D ICs can help us create smarter systems. To help set the stage, the steering committee engaged a number of influential industry speakers to share their perspectives. Bryan Black, Senior Fellow, AMD will present new information in his talk, Die Stacking is Happening. From the world of the... »

Nordson DAGE Announces Latest Order for XM8000

Nordson DAGE Announces Latest Order for XM8000

Nordson DAGE, a division of Nordson Corporation, is pleased to announce its most recent order from a major customer in the semiconductor industry for its XM8000 wafer x-ray metrology tool that will be used for the automatic measurement of wafer bumps and through silicon vias (TSVs) by using 2D and 3D X-ray inspection methods. “The XM8000 represents an entirely new paradigm using Nordson DAGE’... »

Tango Systems Inc. Achieves Conformal Deposition for 15:1 Aspect Ratio TSVs

Tango Systems Inc. Achieves Conformal Deposition for 15:1 Aspect Ratio TSVs

Tango Systems Inc., a leading innovator in high-performance, cost-effective physical vapor deposition (PVD) systems, today announced it has published results for conformal step seed layer coverage for through silicon vias (TSVs) with a 15:1 aspect ratio. This significant achievement represents the industry’s highest TSV step coverage for interposers and 3D ICs. The results were achieved using T... »

3D ASIP 2014 Pre-Conference Symposia Place Emphasis on 3D Design Tools and Flow, and Manufacturing Process Technology

3D ASIP 2014 Pre-Conference Symposia Place Emphasis on 3D Design Tools and Flow, and Manufacturing Process Technology

As 3D integration processes move into volume manufacturing, the 11th Annual 3D Architectures for Semiconductor Integration and Packaging Conference (3D ASIP), which takes place December 10-12 in San Francisco, is gearing up to be the go-to event for this hot market sector. With an expanded full-day pre-conference symposium on design and manufacturing for practical 2.5D and 3D implementation in add... »

Book Review: Vertical 3D Memory Technologies

Book Review: Vertical 3D Memory Technologies

“From so simple a beginning endless forms most beautiful and most wonderful have been, and are being, evolved.” ~ Charles Darwin Charles Darwin was obviously not thinking of 3D semiconductor memories when he said this but the thought is appropriate. With the recent introduction of the first monolithic 3D Flash memory, the time is ripe to describe how the industry came to this point and what ot... »

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