Standards

3D Workshop Panel Discussion Focuses on 3D Standards and EDA Tool Readiness
wideIOdemonstrator 3DAwarefloorplanning

3D Workshop Panel Discussion Focuses on 3D Standards and EDA Tool Readiness

 Are slow standardization and CAD-tool development hindering the progress of 3D IC design and integration? This was the topic of discussion during the Friday 3D Workshop at DATE 2014, which took place this year in Dresden, March 28, 2014. I was invited to moderate this panel discussion, which featured panelists from EDA suppliers, industry, and academia. We wanted to mix it up a bit and involve ... »

Making Progress with 3D IC Design and Test

Making Progress with 3D IC Design and Test

Thank you, Ann Steffora Mutschler (Semiconductor Engineering) for getting to the bottom of the difference of EDA tools for  2.5D and 3D IC design and test, and providing such a clear explanation in your post, “Evolution vs. Revolution”. In this 2-part post, Mutschler explores the EDA vendor arguments that “tool and design flow changes need to be evolutionary, rather than revolutionary.” A... »

Donning my 3D Glasses at the MEPTEC Semiconductor Roadmap Symposium

Donning my 3D Glasses at the MEPTEC Semiconductor Roadmap Symposium

I admit, I always have my 3D glasses on at conferences. But even though the title of this week’s MEPTEC event was “The Semiconductor Roadmap Symposium, A Collaborative Update From Standards Bodies, Industry Groups and the Entire Supply Chain”, it could have been “3D TSVs Roadmap Symposium…” based on the direction the panel discussions took throughout the day. Not that I’m complainin... »

Silicon Photonics: the Next Killer App for 3D ICs? and more from the R&D Community

Silicon Photonics: the Next Killer App for 3D ICs? and more from the R&D Community

First it was going to be memory stacks, then it was Wide I/O DRAM on Memory, and now, as commercialization of 3D ICs gets pushed out further, will it be Silicon Photonics that drives 3D ICs to volume manufacturing? That was the opinion expressed by Michael Liehr, executive VP of Executive VP CNSE, during the SEMICON West 2013 R&D Panel – “A Conversation on the Future of Semiconductor Techn... »

Semi Trade Pubs Talk 3D, Just in time for SEMICON West

Semi Trade Pubs Talk 3D, Just in time for SEMICON West

That Jan Vardaman, she’s so clever! I just finished reading her column on ECTC 2013 in Printed Circuit Design and Fab, and thought her quippy, Las Vegas-y references in the opening paragraph were right on the money. Vardaman’s take on ECTC was similar to my own, discussed here in my review of the foundry panel session.  She also offers some great take-aways from some of the sessions that I m... »

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