3D Topics

SEMICON West 2014: Are 3D ICs Getting the Squeeze?

With the continued innovations in packaging technologies and 2.5D interposers pushing 3D ICs further out from one end, and 16/14nm nodes already qualified without TSVs, making us wait until 10nm, are 3D ICs suddenly getting the squeeze from both sides? That’s one theory I took away from all the conversations...

Ye Antique Towers – Samsung’s 3D NAND Flash SSD 850 Pro

Samsung’s introduction of its 3D NAND Flash SSD 850 Pro has led to the inevitable hullabaloo. Amid all the fuss, it hasn’t taken long for someone to publish the actual die size. This of course is the golden nugget of information that lays the foundation for any cost analysis. Figure 1 shows...

Having the Courage to Design in 3D TSVs

I don’t know why it still surprises me to read conflicting reports on the progress of 3D TSVs. But I think Ron Huemoeller, Amkor, finally hit on it in his closing remarks during today’s webcast, “TSV Packaging at the Tipping Point”, moderated by Pete Singer, Solid StateTechnology/Extension Media. Huemoeller’s presentation and...

Path Finding: Who Performs and When?

Microelectronic products all have mechanical, thermal and electrical properties that degrade until the device is permanently damaged. Path finding adds value to an end-product by pre-determining where the breaking points are, and if or how they can be enlarged. For decades, product designers have used various methods of path finding...

2.5/3D Packaging: Path Finding

2.5D/3D packaging technologies are revitalizing creativity in high technology products. We thought we knew what faster, better, lighter and smaller meant. 2.5D/3D packaging can revolutionize what we thought possible but it will require augmenting our current methods and tools. One key methodology to add would be Path Finding. Path Finding can...

2014 VLSI Symposium, Honolulu

3D NAND Flash at the 2014 VLSI Symposium

Imagine this: aquamarine tints of the Pacific washing sandy Hawaiian beaches amid the balmy breeze and only yards away, several 3D NAND papers being presented at the recent VLSI Symposium in Honolulu. Idyllic! I counted five papers in total associated with various forms of 3D NAND. The protagonists were: SK...

2014 3D InCites Guide to 3D at SEMICON West

I can’t believe it’s already been a year since I last posted my annual guide to 3D at SEMICON West.  One thing I’ve noticed in scanning the “regulars” (SEMI and SEMI partner events) is that all the agendas are  much less focused on 3D integration developments. I think there are...

KLA Tencor: CV310i Wafer Edge Inspection and Metrology Module

CIRCL CV310i module is an advanced Wafer Edge inspection, metrology and profiling system tailored for Advanced Wafer Level Packaging. Simultaneous wafer edge inspection and metrology enables comprehensive data collection from all zones comprising the wafer’s edge: top and bottom near-edge; top and bottom bevel; and apex. Testimonial Some of the...

SSEC: Wet Etch Process for TSV Reveal

SSEC’s wet TSV reveal process achieves -/+ 0.7% Si thickness uniformity under the appropriate post grinding conditions with fast throughput. The two-step process starts with a spin etch for a smooth, fast etch at 10µm/min. The etch is stopped 2µm above the TSVs and then finishes with a selective etch...

Akrion Systems: Vacuum Prime and Dry

Akrion Systems’ vacuum prime and drying technology enables the use of a wet immersion method to introduce liquid chemicals or rinse water throughout the entire HAR feature prior to the oxide etching step.  Pulling a vacuum below the saturated vapor pressure of water, draws liquid into the entire feature, enabling...

SORIN CRM: 3D IC Module for Active Medical Implant

Manufacturing of 3D IC heterogeneous integrated modules for the electronics of a leadless pacemaker in a very small volume has been realized. Manufacturing of 3D IC modules using the described process is ready for medium volume production. Testimonial All the electronics of a leadless pacemaker has been integrated into a...

SETNA: Process for Room Temperature 3D IC Assembly

SETNA, in conjunction with Research Triangle Institute (RTI), has developed a binary alloy (Silver-to-Indium) bonding system for 3D IC assembly that can be compression-bonded at room temperature. Following 3D IC chip stacking, the Ag-In structure is annealed in the solid-state (no melting) to form an Ag₂In interconnect which is stable...

Schiltron 3D Flash

Schiltron 3D Flash replaces 2D-NAND. It uses a unique architecture solving key challenges associated with other 3D-NAND approaches: scalable; no vanishing string currents; uses existing Fab infrastructure and materials; uses existing design approaches for program and erase; endurance of over a million cycles; post-cycling retention of more than 10 years...

3D InCites Interview: RTI in 3D

While most of the research institutes in the US and Asia have been focused on commercializing 3D integration technologies for mass markets such as mobile devices and consumer electronics, one US-based research institute has followed a different path more similar to that of the European research centers; focusing its 3D...