3D Topics

PDN Design, Target Impedance and Path Finding for IC, Package, and PCB

I am fortunate to work with Prof. Madhavan Swaminathan, Founder, CTO, E-System Design, and inventor of our algorithms. Long ago, as an undergraduate engineering student at University of Illinois focused on integrated circuit (IC) design, I enrolled in the required ElectroMagnetics (EM) course to discover it was all about large...

Ideas for Co-optimizing Chip-Package Design

In a recent blog sharing my impressions of July’s Semicon West, I complained a bit about the lack of substantial IC packaging topics at this large IC manufacturing conference and also mentioned that I had observed the same problem at June’s Design Automation Conference. I am glad that I was fairly...

With the Acquisition of Ziptronix, Tessera Takes the 3D IC Plunge

Tessera Technologies has been testing the 3D waters for several years, with the launch of its wholly owned subsidiary, Invensas, in 2011, which focused first on what they called “bridge technologies” that leverage existing packaging technologies to meet higher density requirements while waiting for full implementation of 3D ICs. In...

Can 3D Super-NAND Improve Cost-per-Bit for 3D NAND?

The 3D NAND floodgates just opened a little wider with today’s announcement from BeSang that it has developed 3D Super-NAND technology, based on a monolithic 3D IC process, True 3D™ IC, claiming to be the “lowest cost-per-bit in the NAND market.” With all the recent 3D NAND discussion and announcements...

Move Over 3D Memory, Logic-on-Logic Stacks Have Arrived!

Chalk up another industry first for Tezzaron Semiconductor, who announced just today (or tomorrow, if you are there for the excitement at IEEE 3DIC in Sendai, Japan) that along with their manufacturing subsidiary, Novati Technologies, they have successfully manufactured the world’s first eight-layer 3D IC wafer stack containing active logic. (Figure 1). According...

Executive Viewpoint: Update on Cleans

Last time I checked in with Kim Pollard, Technology Manager, Dynaloy, was a few years ago, when we talked about the importance of cleans for 3D ICs. Dynaloy, a subsidiary of Eastman Chemical Company, develops and creates chemistries specifically for the removal of photoresist, etch residues and other polymers. At...

Subscription Renewals: Can We Move to the 21st Century?

If my fitness regimen can be Internet enabled, why can’t my magazine subscription renewals be? We all get them. Some come in emails while most use the phone call approach. You know, the “unrecognizable number” call that has a ‘few’ questions to answer that turns into many minutes of either...

Improving R&D Efficiency to get “Moore” out of Chips

The semiconductor industry invests more in R&D than any other industry except pharmaceuticals. At the same time, It is dealing with shortening product life cycles. How is the industry expected to continue innovating while still profiting from their R&D investments needed to deliver transitions in main areas such as lithography...

Assembly Design Kits are the Future of Package Design Verification

Unlike the traditional system-on-chip (SoC) design process, which has fully qualified verification methods embodied in the form of process design kits (PDKs), chip design companies and assembly houses have no integrated circuit (IC) package co-design sign-off verification process to help ensure that an IC package will meet manufacturability and performance...

Taking 3D Integration to the Next Level

There is no rest for the weary. Just because we can finally declare that 3D ICs are in production doesn’t mean we’re done working on it. To the contrary, efforts are ongoing at research institutes like imec in Belgium and Leti in France to take 3D integration to the next...

Semiconductor Supplier Updates from SEMICON West 2015

No SEMICON West would be complete without a few laps around Moscone North and South, and some one-on-one chats with suppliers. I stopped in to see several semiconductor supplier companies who annually request an audience with the Queen of 3D to talk about their latest accomplishments, as well as gain...

At AMD, Die Stacking Hits the Big Time

It’s official. Die stacking and interposer integration have been implemented in a high volume consumer application. AMD officially launched the Fiji GPU processor, the first to feature die stacking and high bandwidth (HBM) technology, amidst quite a bit of media fanfare at the E3 gaming conference in Los Angeles and...