Design

EDPS 2017: NOT the usual Electronic DESIGN Process Symposium
EDPS EDPS2 EDPS3 SEMIEDPS

EDPS 2017: NOT the usual Electronic DESIGN Process Symposium

When planning the 24th EDPS, the organizing committee, chaired by Shishpal Rawat, former Intel executive, took a number of bold steps EDPS was traditionally held in the spring. We moved EDPS to the fall because that’s a time when more new IC projects are being planned. After many years of holding it in Monterey, we moved EDPS to Milpitas to make it more easily accessible for Silicon Valley folks... »

Executive Viewpoint: Breaking The Chicken and Egg Cycle for HDAP
Keith Felton - Mentor BSD

Executive Viewpoint: Breaking The Chicken and Egg Cycle for HDAP

  For several years now, Herb Reiter, eda2asic, and John Ferguson, Mentor Graphics, have been evangelizing about the necessity of assembly design kits (ADK), similar to the process design kits (PDKs) for chip designers, to help drive ecosystem capabilities for what is collectively now being called high density advanced packaging (HDAP), comprising 2.5D IC, 3D IC and high density fan-out wafer... »

Executive Viewpoint: Inside a Multi-Project Wafer Program for 3D Integration
12dd2f1 CMPflow copy

Executive Viewpoint: Inside a Multi-Project Wafer Program for 3D Integration

Multi-project wafer (MPW) programs have long been considered an economical way to integrate different IC designs from various teams to produce IC design prototypes and low volumes. Because IC fabrication costs are extremely high, it makes sense to share mask and wafer resources in this way. MPWs were historically used for 2D designs, but in 2009, Tezzaron Semiconductor launched an MPW for DARPA to... »

Executive Viewpoint: An Interposer Integration and 3D IC Success Story
Farhang Yazdani rigidinterposer

Executive Viewpoint: An Interposer Integration and 3D IC Success Story

While the rest of the industry anticipates the coming of 3D ICs, and along with it the long anticipated return on investment that goes with it, one small Silicon Valley fabless has been chugging along, already reaping the benefits of interposer integration and 3D IC technologies. I first heard Farhang Yazdani, CEO, BroadPak present during a GSA 3DIC Working Group meeting on 3D IC readiness, and th... »

Executive Interview: Si2 Aims to Boost Confidence in Designing 3D ICs
Watering_steam_locomotive si2 stevenschulz

Executive Interview: Si2 Aims to Boost Confidence in Designing 3D ICs

There’s no doubt left in the minds of semiconductor device manufacturers that the processes required to build interposer-based and 3D IC devices are matured and ready for production. However, the jury is still out in the design community because designing 3D ICs still poses a challenge. Si2 has set out to change that and bring confidence to the minds of chip and system-level designers. Steve Sc... »

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