Design

Synopsys: Galaxy Implementation Platform

Product Description Synopsys’ Galaxy™ Implementation Platform is the industry’s leading solution for IC implementation and signoff. Now available with powerful automation for multi-die implementation and foundry certified design flows, Galaxy provides a silicon-proven path to successful implementation of 3D-IC stacked die and silicon-interposer based 2.5D systems. Testimonial Following collaborations with...

Cielution: CielSpot, CielSpot-CTM, CielMech

Product Description CielSpot, CielSpot-CTM and CielMech are thermal and mechanical simulation Software As A Service (SAAS) products based on Cielution’s innovative Cloud based collaboration platform. Users define 3D IC stacking, process and power distribution details at the Cielution online portal to implement complex, but necessary design methodologies with minimal effort....

SavanSys Solutions: 2.5D & 3D Packaging Cost Model

Product Description The 2.5D & 3D Packaging Cost Model is the first tool available to model the total cost and yield from fabrication of the wafers to complete assembly. The user is able to edit a variety of parameters, including TSV and interposer characteristics and die preparation details, and generate...

Apache Design: RedHawk-3DX

Product Description Apache Design’s fourth-generation RedHawk™-3DX simulation software technology extends previous generations’ capabilities to address sub-20 nanometer (nm) designs with 3+ gigahertz performance and billions of gates. It is also architected to support the simulation of emerging chip and packaging technologies using multi-die three-dimensional ICs (3D-ICs) for smart electronic products....

Mentor Graphics: Calibre

Product Description Calibre enables signoff verification of chip stacks with flip chips, silicon interposers and through-silicon vias (TSVs). Verification of individual dies is followed by checks on the interfaces between dies, including dimensional checks (bump alignment and rotation), connectivity checks (LVS), and parasitic extraction (PEX) using a special 3D-IC rule...

ALLVIA: Silicon Interposers for Electro-Optical Engines

Product Description 2.5D Silicon Interposers form the base for the assembly of electro-optic engines for Chip-to-World Interconnects. These electro-optic engines with TSVs, the foundation for so-called “active cables”, offer outstanding Interconnect Bandwidth Density. They operate at 10 Gb/s today and are expected to migrate to 25 Gb/s or higher in...

E-System Design: Sphinx 3D Path Finder

Product Description 3DPF is a full wave 3D path finding tool based on a patented, mesh-less algorithm for cylindrical objects (vias and bond wires).  By not meshing cylindrical objects, significant memory and CPU time is saved allowing users to analyze much larger structures in a much shorter time. Testimonial From Sherry...

3D IC Blogosphere Update – Feb 22

Has it really been a month since the European 3D TSV Summit? This inaugural event certainly caused a buzz in the blogosphere! In addition to all my coverage after having attended the event, Phil Garrou has been slogging his way thorough the proceedings to provide an in-depth review on Insights...

Cielution thermal modeling

Tips on Modeling Warpage for 3D ICs

This week’s webinar on chip stack assembly simulation, presented by Kamal Karimanal of Cielution offered some useful information on how modeling can be used to minimize warpage in 3D stacking. In 3D stacking, versus traditional flip chip processes, thickness of RDL layers in comparison with the thinned die or wafer can lead...